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20UPGFC0142714 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 67f43381d04bade272d27ef7

This Revision: 67f43381d04bade272d27ef8

Latest Revision: 67f43381d04bade272d27ef8

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	11
SldoTrimD	8

Parameter

ADCcalPar	-1.0 0.179 10000.0
Name	0x22d7a
ChipId	14
InjCap	7.75
NfDSLDO	1.2586167897859362
NfASLDO	1.2601737590196094
NfACB	1.2582168343864604
VcalPar	12.803 0.191
IrefTrim	8
KSenseInA	21004.001
KSenseInD	21639.507

KSenseShuntA	26004.953619047617
KSenseShuntD	26791.770571428573
KShuntA	986.398
KShuntD	972.524

PixelConfig

Diff from previous revision None

ITKPIXV2

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	11
SldoTrimD	8

Parameter

ADCcalPar	-1.0 0.179 10000.0
Name	0x22d7a
ChipId	14
InjCap	7.75
NfDSLDO	1.2586167897859362
NfASLDO	1.2601737590196094
NfACB	1.2582168343864604
VcalPar	12.803 0.191
IrefTrim	8
KSenseInA	21004.001
KSenseInD	21639.507
KSenseShuntA	26004.953619047617
KSenseShuntD	26791.770571428573
KShuntA	986.398
KShuntD	972.524