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20UPGFC0083144 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 67ae38e197ab279d6689e0a7

This Revision: 67ae403997ab279d6689e102

Latest Revision: 67ae404897ab279d6689e128

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	1
SerSelOut3	3
SldoTrimA	10
SldoTrimD	4

Parameter

ADCcalPar	12.603 0.19 10000.0
Name	0x144c8
ChipId	12
InjCap	7.778
NfDSLDO	1.2876403640610248
NfASLDO	1.286621763391985
NfACB	1.2842115533582006
VcalPar	5.031 0.205
IrefTrim	8
KSenseInA	20988.647
KSenseInD	21615.881

KSenseShuntA	25985.943904761905
KSenseShuntD	26762.519333333334
KShuntA	1062.578
KShuntD	1034.655

PixelConfig

Diff from previous revision 67ae38e197ab279d6689e0a8

No diff is present.