20UPGFC0083160 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: cold

Config: 67ae38e197ab279d6689e0a5

This Revision: 67ae38e197ab279d6689e0a6

Latest Revision: 67ae404797ab279d6689e127

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA9
SldoTrimD6

Parameter

ADCcalPar
  • 11.54
  • 0.184
  • 10000.0
Name0x144d8
ChipId15
InjCap7.832
NfDSLDO1.2888550395992657
NfASLDO1.2875783774008869
NfACB1.2857996570346062
VcalPar
  • 3.612
  • 0.198
IrefTrim11
KSenseInA21464.002
KSenseInD21714.962
KSenseShuntA26574.478666666666
KSenseShuntD26885.191047619046
KShuntA1069.483
KShuntD1033.924

PixelConfig

Diff from previous revision None

RD53B
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA9
SldoTrimD6
Parameter
ADCcalPar
  • 11.54
  • 0.184
  • 10000.0
Name0x144d8
ChipId15
InjCap7.832
NfDSLDO1.2888550395992657
NfASLDO1.2875783774008869
NfACB1.2857996570346062
VcalPar
  • 3.612
  • 0.198
IrefTrim11
KSenseInA21464.002
KSenseInD21714.962
KSenseShuntA26574.478666666666
KSenseShuntD26885.191047619046
KShuntA1069.483
KShuntD1033.924