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20UPGFC0134201 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: LP

Config: 673be5278bd2691624147794

This Revision: 673be5278bd2691624147795

Latest Revision: 673be5278bd2691624147795

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	1
SerSelOut3	3
SldoTrimA	9
SldoTrimD	7

Parameter

ADCcalPar	1.894 0.195 10000.0
Name	0x20c39
ChipId	12
InjCap	7.858999999999999
NfDSLDO	1.252212221905257
NfASLDO	1.2538977988049946
NfACB	1.2506409214055012
VcalPar	15.36 0.209
IrefTrim	13
KSenseInA	21158.438
KSenseInD	21648.964

KSenseShuntA	26196.161333333333
KSenseShuntD	26803.47923809524
KShuntA	1002.65
KShuntD	989.381

PixelConfig

Diff from previous revision 67368c9556f39c8f40b1edae

No diff is present.