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20UPGFC0134231 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: LP

Config: 673bdf058bd2691624147475

This Revision: 673bdf058bd2691624147476

Latest Revision: 673bdf058bd2691624147476

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	7

Parameter

ADCcalPar	2.388 0.187 10000.0
Name	0x20c57
ChipId	13
InjCap	7.644
NfDSLDO	1.2562035199581096
NfASLDO	1.2531037932765365
NfACB	1.250589729239869
VcalPar	16.306 0.201
IrefTrim	11
KSenseInA	21467.676
KSenseInD	21389.252

KSenseShuntA	26579.02742857143
KSenseShuntD	26481.931047619048
KShuntA	1001.066
KShuntD	993.574

PixelConfig

Diff from previous revision 6736894256f39c8f40b1e924

No diff is present.