20UPGFC0134218 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: cold

Config: 673bdca28bd26916241472fe

This Revision: 673bdca28bd26916241472ff

Latest Revision: 673bdca28bd26916241472ff

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut23
SerSelOut31
SldoTrimA12
SldoTrimD9

Parameter

ADCcalPar
  • -1.0
  • 0.174
  • 10000.0
Name0x20c4a
ChipId14
InjCap7.791
NfDSLDO1.2503837995055413
NfASLDO1.2517979699553212
NfACB1.2491410436557344
VcalPar
  • 14.055
  • 0.186
IrefTrim7
KSenseInA20897.403
KSenseInD21562.015
KSenseShuntA25872.975142857144
KSenseShuntD26695.828095238096
KShuntA1006.82
KShuntD973.185

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut23
SerSelOut31
SldoTrimA12
SldoTrimD9
Parameter
ADCcalPar
  • -1.0
  • 0.174
  • 10000.0
Name0x20c4a
ChipId14
InjCap7.791
NfDSLDO1.2503837995055413
NfASLDO1.2517979699553212
NfACB1.2491410436557344
VcalPar
  • 14.055
  • 0.186
IrefTrim7
KSenseInA20897.403
KSenseInD21562.015
KSenseShuntA25872.975142857144
KSenseShuntD26695.828095238096
KShuntA1006.82
KShuntD973.185