20UPGFC0134198 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: LP

Config: 673bdb168bd26916241472d5

This Revision: 673bdb168bd26916241472d6

Latest Revision: 673bdb168bd26916241472d6

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut23
SerSelOut31
SldoTrimA6
SldoTrimD5

Parameter

ADCcalPar
  • -1.0
  • 0.196
  • 10000.0
Name0x20c36
ChipId14
InjCap7.898000000000001
NfDSLDO1.2526466907244151
NfASLDO1.2561606665938485
NfACB1.2513039519775588
VcalPar
  • 15.162
  • 0.21
IrefTrim11
KSenseInA21154.522
KSenseInD21491.392
KSenseShuntA26191.31295238095
KSenseShuntD26608.390095238094
KShuntA998.857
KShuntD1001.982

PixelConfig

Diff from previous revision 6736855756f39c8f40b1e621

No diff is present.