20UPGFC0134199 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: LP

Config: 673bdb0f8bd26916241472c8

This Revision: 673bdb0f8bd26916241472c9

Latest Revision: 673bdb0f8bd26916241472c9

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA10
SldoTrimD12

Parameter

ADCcalPar
  • 3.9290000000000003
  • 0.178
  • 10000.0
Name0x20c37
ChipId13
InjCap7.866999999999999
NfDSLDO1.2535406850550503
NfASLDO1.2545263190048972
NfACB1.2498981248056167
VcalPar
  • 12.851
  • 0.191
IrefTrim4
KSenseInA21057.539
KSenseInD22108.708
KSenseShuntA26071.238761904762
KSenseShuntD27372.686095238096
KShuntA996.213
KShuntD1006.162

PixelConfig

Diff from previous revision 6736855556f39c8f40b1e618

No diff is present.