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20UPGFC0134221 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: LP

Config: 673bd2708bd2691624146827

This Revision: 673bd2708bd2691624146828

Latest Revision: 673bd2708bd2691624146828

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	7
SldoTrimD	7

Parameter

ADCcalPar	-1.0 0.197 10000.0
Name	0x20c4d
ChipId	15
InjCap	7.899
NfDSLDO	1.2584092198474963
NfASLDO	1.2603947458195366
NfACB	1.256666527987145
VcalPar	12.152 0.21
IrefTrim	11
KSenseInA	20895.975
KSenseInD	21748.19

KSenseShuntA	25871.207142857143
KSenseShuntD	26926.330476190476
KShuntA	1010.342
KShuntD	980.305

PixelConfig

Diff from previous revision 673686b556f39c8f40b1e7cc

No diff is present.