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20UPGFC0134216 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: LP

Config: 673bd0648bd26916241465c9

This Revision: 673bd0648bd26916241465ca

Latest Revision: 673bd0648bd26916241465ca

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	9
SldoTrimD	7

Parameter

ADCcalPar	-1.0 0.19 10000.0
Name	0x20c48
ChipId	14
InjCap	7.597000000000001
NfDSLDO	1.251193847583565
NfASLDO	1.2526651513282547
NfACB	1.2497653973460023
VcalPar	15.072 0.204
IrefTrim	6
KSenseInA	20996.333
KSenseInD	21625.506

KSenseShuntA	25995.459904761905
KSenseShuntD	26774.436
KShuntA	1020.503
KShuntD	995.751

PixelConfig

Diff from previous revision 67368deb56f39c8f40b1f0a9

No diff is present.