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20UPGFC0134269 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: LP

Config: 673bd05e8bd26916241465bc

This Revision: 673bd05e8bd26916241465bd

Latest Revision: 673bd05e8bd26916241465bd

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	8
SldoTrimD	9

Parameter

ADCcalPar	-1.0 0.184 10000.0
Name	0x20c7d
ChipId	13
InjCap	7.917999999999999
NfDSLDO	1.255379206779624
NfASLDO	1.256479113462547
NfACB	1.2540078945515636
VcalPar	13.137 0.196
IrefTrim	6
KSenseInA	21003.519
KSenseInD	21225.166

KSenseShuntA	26004.35685714286
KSenseShuntD	26278.77695238095
KShuntA	990.031
KShuntD	972.629

PixelConfig

Diff from previous revision 67368de856f39c8f40b1f0a1

No diff is present.