20UPGFC0134182 Chip Configuration

Stage: MODULE/PARYLENE_MASKING

Branch: LP

Config: 6737f62ef2d4e487faac9c89

This Revision: 6737f62ef2d4e487faac9c8a

Latest Revision: 6737f62ef2d4e487faac9c8a

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux02
DataMergeOutMux13
DataMergeOutMux20
DataMergeOutMux31
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut21
SerSelOut33
SldoTrimA11
SldoTrimD10

Parameter

ADCcalPar
  • 2.007
  • 0.179
  • 10000.0
Name0x20c26
ChipId12
InjCap7.790000000000001
NfDSLDO1.2521062941328631
NfASLDO1.260977058828787
NfACB1.2511206536110937
VcalPar
  • 11.048
  • 0.191
IrefTrim10
KSenseInA21345.347
KSenseInD21758.021
KSenseShuntA26427.572476190475
KSenseShuntD26938.50219047619
KShuntA1008.959
KShuntD997.733

PixelConfig

Diff from previous revision 67368d3f56f39c8f40b1ef34

No diff is present.