20UPGFC0134235 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 6716a109af7cafeefcf4f99d

This Revision: 67cb76602a75b7658af1f286

Latest Revision: 67d44e4e6937b99d1d01a5e5

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut23
SerSelOut31
SldoTrimA11
SldoTrimD8

Parameter

ADCcalPar
  • -1.0
  • 0.19
  • 10000.0
Name0x20c5b
ChipId14
InjCap7.744999999999999
NfDSLDO1.252130689000393
NfASLDO1.2540876788743667
NfACB1.2509022136050514
VcalPar
  • 11.086
  • 0.204
IrefTrim10
KSenseInA20991.194
KSenseInD21272.853
KSenseShuntA25989.097333333335
KSenseShuntD26337.818
KShuntA985.616
KShuntD991.137

PixelConfig

Diff from previous revision 67368b2b56f39c8f40b1eab1

No diff is present.