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20UPGFC0134218 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 670073e06cd1e9c5a1497bdb

This Revision: 6706b17675bf58c1aafff2df

Latest Revision: 67368d4456f39c8f40b1ef46

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	12
SldoTrimD	9

Parameter

ADCcalPar	-1.0 0.174 10000.0
Name	0x20c4a
ChipId	14
InjCap	7.791
NfDSLDO	1.2503837995055413
NfASLDO	1.2517979699553212
NfACB	1.2491410436557344
VcalPar	14.055 0.186
IrefTrim	7
KSenseInA	20897.403
KSenseInD	21562.015

KSenseShuntA	25872.975142857144
KSenseShuntD	26695.828095238096
KShuntA	1006.82
KShuntD	973.185

PixelConfig

Diff from previous revision 6705d1f0ecb4e51d971a108c

No diff is present.