20UPGFC0134214 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 670073b16cd1e9c5a149742a

This Revision: 68e9bb5d9a414b06a4f030d9

Latest Revision: 68f6156c6af8105a0d07b2c5

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SerSelOut0	1
SerSelOut1	3
SerSelOut2	3
SerSelOut3	3
SldoTrimA	9
SldoTrimD	9

Parameter

ADCcalPar	3.071 0.187 10000.0
Name	0x20c46
ChipId	15
InjCap	7.783
NfDSLDO	1.25109979868051
NfASLDO	1.2524996705794733
NfACB	1.2500570369598538
VcalPar	14.23 0.202
IrefTrim	11
KSenseInA	21086.738
KSenseInD	21711.626

KSenseShuntA	26107.389904761905
KSenseShuntD	26881.060761904762
KShuntA	986.637
KShuntD	995.667

PixelConfig

Diff from previous revision 68cca6236d0947a8ea3b7952

No diff is present.