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20UPGFC0134215 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 670073b16cd1e9c5a1497424

This Revision: 6706e6fd75bf58c1aafff466

Latest Revision: 67368de556f39c8f40b1f099

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	1
SerSelOut3	3
SldoTrimA	12
SldoTrimD	11

Parameter

ADCcalPar	0.337 0.181 10000.0
Name	0x20c47
ChipId	12
InjCap	7.644
NfDSLDO	1.2548262945548503
NfASLDO	1.2518979618053057
NfACB	1.2489124908557698
VcalPar	12.537 0.194
IrefTrim	9
KSenseInA	21281.969
KSenseInD	21876.847

KSenseShuntA	26349.104476190478
KSenseShuntD	27085.620095238097
KShuntA	992.507
KShuntD	978.926

PixelConfig

Diff from previous revision 670073b16cd1e9c5a1497425

No diff is present.