20UPGFC0134212 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 6700738e6cd1e9c5a1497000

This Revision: 68cb6ed36d0947a8ea3b7633

Latest Revision: 690132f5fb15341973b89e7b

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffLcc	200
DiffLccEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0

EnCoreCol3	0
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	15
SerSelOut0	3
SerSelOut1	3
SerSelOut2	3
SerSelOut3	1
SldoTrimA	7
SldoTrimD	6

Parameter

ADCcalPar	1.19 0.188 10000.0
Name	0x20c44
ChipId	14
InjCap	7.935
NfDSLDO	1.2548893501207607
NfASLDO	1.2542179807473324
NfACB	1.251561072163127
VcalPar	11.448 0.201
IrefTrim	13
KSenseInA	21531.679
KSenseInD	21458.472

KSenseShuntA	26658.26923809524
KSenseShuntD	26567.632
KShuntA	1006.749
KShuntD	989.806

PixelConfig

Diff from previous revision 68cb28cc90711e7cfe88c239

No diff is present.