20UPGFC0134212 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: cold

Config: 6700738e6cd1e9c5a1496ff8

This Revision: 6700738e6cd1e9c5a1496ff9

Latest Revision: 6700738e6cd1e9c5a1496ff9

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut23
SerSelOut31
SldoTrimA7
SldoTrimD6

Parameter

ADCcalPar
  • 1.19
  • 0.188
  • 10000.0
Name0x20c44
ChipId14
InjCap7.935
NfDSLDO1.2548893501207607
NfASLDO1.2542179807473324
NfACB1.251561072163127
VcalPar
  • 11.448
  • 0.201
IrefTrim13
KSenseInA21531.679
KSenseInD21458.472
KSenseShuntA26658.26923809524
KSenseShuntD26567.632
KShuntA1006.749
KShuntD989.806

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut23
SerSelOut31
SldoTrimA7
SldoTrimD6
Parameter
ADCcalPar
  • 1.19
  • 0.188
  • 10000.0
Name0x20c44
ChipId14
InjCap7.935
NfDSLDO1.2548893501207607
NfASLDO1.2542179807473324
NfACB1.251561072163127
VcalPar
  • 11.448
  • 0.201
IrefTrim13
KSenseInA21531.679
KSenseInD21458.472
KSenseShuntA26658.26923809524
KSenseShuntD26567.632
KShuntA1006.749
KShuntD989.806