20UPGFC0134236 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: cold

Config: 6700731a6cd1e9c5a14965e9

This Revision: 6700731a6cd1e9c5a14965ea

Latest Revision: 6716a109af7cafeefcf4f997

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA6
SldoTrimD6

Parameter

ADCcalPar
  • -1.0
  • 0.184
  • 10000.0
Name0x20c5c
ChipId13
InjCap7.876999999999999
NfDSLDO1.255348181846227
NfASLDO1.2564909267974431
NfACB1.2537483389145252
VcalPar
  • 11.399
  • 0.198
IrefTrim8
KSenseInA21180.457
KSenseInD21860.151
KSenseShuntA26223.42295238095
KSenseShuntD27064.948857142856
KShuntA1006.766
KShuntD985.685

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA6
SldoTrimD6
Parameter
ADCcalPar
  • -1.0
  • 0.184
  • 10000.0
Name0x20c5c
ChipId13
InjCap7.876999999999999
NfDSLDO1.255348181846227
NfASLDO1.2564909267974431
NfACB1.2537483389145252
VcalPar
  • 11.399
  • 0.198
IrefTrim8
KSenseInA21180.457
KSenseInD21860.151
KSenseShuntA26223.42295238095
KSenseShuntD27064.948857142856
KShuntA1006.766
KShuntD985.685