20UPGFC0134232 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: warm

Config: 6700731a6cd1e9c5a14965e2

This Revision: 6704860d07491bdbe9c8d932

Latest Revision: 6704b97cefa50216ebc53e5e

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane15
SerSelOut03
SerSelOut13
SerSelOut23
SerSelOut31
SldoTrimA8
SldoTrimD8

Parameter

ADCcalPar
  • 5.469
  • 0.187
  • 10000.0
Name0x20c58
ChipId14
InjCap7.681
NfDSLDO1.2517937966833415
NfASLDO1.2531651089114018
NfACB1.2502225014220223
VcalPar
  • -1.0
  • 0.19
IrefTrim7
KSenseInA21023.637
KSenseInD21323.246
KSenseShuntA26029.264857142858
KSenseShuntD26400.209333333332
KShuntA1000.637
KShuntD984.633

PixelConfig

Diff from previous revision 670485f407491bdbe9c8d902

No diff is present.