20UPGFC0134180 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 670072806cd1e9c5a1495af3

This Revision: 6705bc8eecb4e51d971a0d89

Latest Revision: 67368c9856f39c8f40b1edb6

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA8
SldoTrimD9

Parameter

ADCcalPar
  • 5.109
  • 0.187
  • 10000.0
Name0x20c24
ChipId13
InjCap7.9959999999999996
NfDSLDO1.2526515306443236
NfASLDO1.2549371043623003
NfACB1.2504230962692964
VcalPar
  • 13.585
  • 0.201
IrefTrim11
KSenseInA21310.055
KSenseInD21542.994
KSenseShuntA26383.87761904762
KSenseShuntD26672.278285714285
KShuntA1000.461
KShuntD1003.519

PixelConfig

Diff from previous revision 6705aaec024597e6b2bcc40b

No diff is present.