20UPGFC0134242 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: cold

Config: 67006f426cd1e9c5a1495593

This Revision: 67006f426cd1e9c5a1495594

Latest Revision: 67006f426cd1e9c5a1495594

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA5
SldoTrimD6

Parameter

ADCcalPar
  • 2.199
  • 0.187
  • 10000.0
Name0x20c62
ChipId15
InjCap7.868000000000001
NfDSLDO1.2580050638578042
NfASLDO1.2575193972535372
NfACB1.2546482505636076
VcalPar
  • 15.703999999999999
  • 0.202
IrefTrim12
KSenseInA21195.386
KSenseInD21717.83
KSenseShuntA26241.906476190477
KSenseShuntD26888.741904761904
KShuntA998.029
KShuntD993.975

PixelConfig

Diff from previous revision None

ITKPIXV2
GlobalConfig
AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffLcc200
DiffLccEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane15
SerSelOut01
SerSelOut13
SerSelOut23
SerSelOut33
SldoTrimA5
SldoTrimD6
Parameter
ADCcalPar
  • 2.199
  • 0.187
  • 10000.0
Name0x20c62
ChipId15
InjCap7.868000000000001
NfDSLDO1.2580050638578042
NfASLDO1.2575193972535372
NfACB1.2546482505636076
VcalPar
  • 15.703999999999999
  • 0.202
IrefTrim12
KSenseInA21195.386
KSenseInD21717.83
KSenseShuntA26241.906476190477
KSenseShuntD26888.741904761904
KShuntA998.029
KShuntD993.975