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20UPGFC0095269 Chip Configuration

Stage: MODULE/FINAL_COLD

Branch: LP

Config: 66db3719d82248abc217a4d3

This Revision: 66db371bd82248abc217a4d4

Latest Revision: 66db371bd82248abc217a4d4

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	2

DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	4
SldoTrimA	7
SldoTrimD	7

Parameter

ADCcalPar	11.704 0.186 10000.0
Name	0x17425
ChipId	12
InjCap	7.848
NfDSLDO	1.2926304984015102
NfASLDO	1.291984096965451
NfACB	1.2892835754103609
VcalPar	4.608 0.199
IrefTrim	12
KSenseInA	21100.082
KSenseInD	21707.281

KSenseShuntA	26123.911047619047
KSenseShuntD	26875.68123809524
KShuntA	1079.224
KShuntD	1038.349

PixelConfig

Diff from previous revision None

RD53B

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	4
SldoTrimA	7
SldoTrimD	7

Parameter

ADCcalPar	11.704 0.186 10000.0
Name	0x17425
ChipId	12
InjCap	7.848
NfDSLDO	1.2926304984015102
NfASLDO	1.291984096965451
NfACB	1.2892835754103609
VcalPar	4.608 0.199
IrefTrim	12
KSenseInA	21100.082
KSenseInD	21707.281
KSenseShuntA	26123.911047619047
KSenseShuntD	26875.68123809524
KShuntA	1079.224
KShuntD	1038.349