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20UPGFC0084846 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: cold

Config: 66d8f3827641579700e3ff0c

This Revision: 66d8f3827641579700e3ff0d

Latest Revision: 66d8f3827641579700e3ff0d

Global Config

AuroraActiveLanes	15
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	350
DiffPreampL	900
DiffPreampM	900
DiffPreampR	900
DiffPreampT	900
DiffPreampTL	900
DiffPreampTR	900
DiffVff	150
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0

DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SldoTrimA	6
SldoTrimD	8

Parameter

ADCcalPar	9.136 0.19 10000.0
Name	0x14b6e
ChipId	2
InjCap	7.999
NfDSLDO	1.2952100555865922
NfASLDO	1.2937789000683253
NfACB	1.2911026392491667
VcalPar	4.055 0.204
IrefTrim	8
KSenseInA	21101.978
KSenseInD	21697.316

KSenseShuntA	26126.258476190476
KSenseShuntD	26863.34361904762
KShuntA	1088.398
KShuntD	1071.495

PixelConfig

Diff from previous revision None

RD53B

GlobalConfig

AuroraActiveLanes	15
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	350
DiffPreampL	900
DiffPreampM	900
DiffPreampR	900
DiffPreampT	900
DiffPreampTL	900
DiffPreampTR	900
DiffVff	150
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	15
SldoTrimA	6
SldoTrimD	8

Parameter

ADCcalPar	9.136 0.19 10000.0
Name	0x14b6e
ChipId	2
InjCap	7.999
NfDSLDO	1.2952100555865922
NfASLDO	1.2937789000683253
NfACB	1.2911026392491667
VcalPar	4.055 0.204
IrefTrim	8
KSenseInA	21101.978
KSenseInD	21697.316
KSenseShuntA	26126.258476190476
KSenseShuntD	26863.34361904762
KShuntA	1088.398
KShuntD	1071.495