20UPGFC0090725 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 669ab2ac63a7cd79d1ba6ed3

This Revision: 669ac1a263a7cd79d1ba704c

Latest Revision: 669ac1a263a7cd79d1ba704c

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane1
SldoTrimA9
SldoTrimD6

Parameter

ADCcalPar
  • 8.578
  • 0.197
  • 10000.0
Name0x16265
ChipId15
InjCap7.691999999999999
NfDSLDO-0.015637672243005996
NfASLDO-0.015637672243005996
NfACB-0.015637672243005996
VcalPar
  • 2.927
  • 0.209
IrefTrim10
KSenseInA20807.353
KSenseInD21303.716
KSenseShuntA25761.484666666667
KSenseShuntD26376.029333333332
KShuntA1045.462
KShuntD1063.615

PixelConfig

Diff from previous revision 669ab2ac63a7cd79d1ba6ed4

No diff is present.