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20UPGFC0090725 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: cold

Config: 669ab2ac63a7cd79d1ba6ecb

This Revision: 669ab2ac63a7cd79d1ba6ecc

Latest Revision: 669ab2ac63a7cd79d1ba6ecc

Global Config

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0

DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	1
SldoTrimA	9
SldoTrimD	6

Parameter

ADCcalPar	8.578 0.197 10000.0
Name	0x16265
ChipId	15
InjCap	7.691999999999999
NfDSLDO	-0.015637672243005996
NfASLDO	-0.015637672243005996
NfACB	-0.015637672243005996
VcalPar	2.927 0.209
IrefTrim	10
KSenseInA	20807.353
KSenseInD	21303.716

KSenseShuntA	25761.484666666667
KSenseShuntD	26376.029333333332
KShuntA	1045.462
KShuntD	1063.615

PixelConfig

Diff from previous revision None

RD53B

GlobalConfig

AuroraActiveLanes	1
CdrClkSel	0
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	32
ServiceBlockEn	1
ServiceBlockPeriod	50
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	1
SldoTrimA	9
SldoTrimD	6

Parameter

ADCcalPar	8.578 0.197 10000.0
Name	0x16265
ChipId	15
InjCap	7.691999999999999
NfDSLDO	-0.015637672243005996
NfASLDO	-0.015637672243005996
NfACB	-0.015637672243005996
VcalPar	2.927 0.209
IrefTrim	10
KSenseInA	20807.353
KSenseInD	21303.716
KSenseShuntA	25761.484666666667
KSenseShuntD	26376.029333333332
KShuntA	1045.462
KShuntD	1063.615