20UPGFC0135075 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: warm

Config: 665644bf7c078bd48a3ad865

This Revision: 6658c931442c248f1aebb9d0

Latest Revision: 6659100e442c248f1aebbb63

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane1
SldoTrimA9
SldoTrimD7

Parameter

ADCcalPar
  • 3.034
  • 0.19
  • 10000.0
Name0x20fa3
ChipId15
InjCap8.111
NfDSLDO1.2515830628193532
NfASLDO1.2522972736518225
NfACB1.249997514771271
VcalPar
  • -15.0
  • 0.2
IrefTrim10
KSenseInA21361.417
KSenseInD21648.053
KSenseShuntA26447.468666666668
KSenseShuntD26802.351333333332
KShuntA1004.645
KShuntD988.333

PixelConfig

Diff from previous revision 6658c87d442c248f1aebb98e

No diff is present.