20UPGFC0135082 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: warm

Config: 665644bf7c078bd48a3ad863

This Revision: 6659100b442c248f1aebbb54

Latest Revision: 6659100b442c248f1aebbb54

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane8
SldoTrimA11
SldoTrimD11

Parameter

ADCcalPar
  • -1.0
  • 0.179
  • 10000.0
Name0x20faa
ChipId14
InjCap7.597000000000001
NfDSLDO1.249185105205352
NfASLDO1.2505420922154544
NfACB1.2485851741061487
VcalPar
  • -9.0
  • 0.19
IrefTrim10
KSenseInA21202.512
KSenseInD21401.553
KSenseShuntA26250.729142857144
KSenseShuntD26497.16085714286
KShuntA1015.739
KShuntD974.29

PixelConfig

Diff from previous revision 66590cba442c248f1aebbb16

No diff is present.