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20UPGFC0082566 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 65e61779ff02867cbecc901a

This Revision: 65e61779ff02867cbecc901b

Latest Revision: 66a0233d6cdf72011b6697bb

Global Config

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2

DataMergeOutMux3	3
SerEnLane	1
SldoTrimA	12
SldoTrimD	7
CdrClkSel	0

Parameter

ADCcalPar	15.176 0.182 10000.0
Name	0x14286
ChipId	13
InjCap	7.822
NfDSLDO	1.2853779253207926
NfASLDO	1.2844741540537843
NfACB	1.2827096482467684
VcalPar	2.813 0.195
IrefTrim	7
KSenseInA	21277.003
KSenseInD	21959.037

KSenseShuntA	26342.956095238096
KSenseShuntD	27187.379142857142
KShuntA	1056.338
KShuntD	1037.388

PixelConfig

Diff from previous revision None

RD53B

GlobalConfig

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	1
SldoTrimA	12
SldoTrimD	7
CdrClkSel	0

Parameter

ADCcalPar	15.176 0.182 10000.0
Name	0x14286
ChipId	13
InjCap	7.822
NfDSLDO	1.2853779253207926
NfASLDO	1.2844741540537843
NfACB	1.2827096482467684
VcalPar	2.813 0.195
IrefTrim	7
KSenseInA	21277.003
KSenseInD	21959.037
KSenseShuntA	26342.956095238096
KSenseShuntD	27187.379142857142
KShuntA	1056.338
KShuntD	1037.388