20UPGFC0084915 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: warm

Config: 6573b2d335689ddfe79d0412

This Revision: 6573cc9b35689ddfe79d055b

Latest Revision: 6573ced035689ddfe79d060b

Global Config

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0

DataMergeOutMux3	1
SerEnLane	4
SldoTrimA	7
SldoTrimD	9
CdrClkSel	0

Parameter

ADCcalPar	13.0 0.184 10000.0
Name	0x14bb3
ChipId	12
InjCap	7.980999999999999
NfDSLDO	1.2911132091281807
NfASLDO	1.2938183550888174
NfACB	1.2882649337516368
VcalPar	-2.0 0.2
IrefTrim	8
KSenseInA	21251.923
KSenseInD	21747.299

KSenseShuntA	26311.904666666665
KSenseShuntD	26925.227333333332
KShuntA	1061.684
KShuntD	1050.163

PixelConfig

Diff from previous revision 6573cabd35689ddfe79d0519

RD53B

Parameter

VcalPar	-2.0 0.2