20UPGFC0084905 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: warm

Config: 65736b5f35689ddfe79d0127

This Revision: 65736da135689ddfe79d015d

Latest Revision: 6573af4035689ddfe79d0366

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane8
SldoTrimA9
SldoTrimD10

Parameter

ADCcalPar
  • 6.0
  • 0.192
  • 10000.0
Name0x14ba9
ChipId14
InjCap7.73
NfDSLDO1.2857871939892718
NfASLDO1.2848572783552323
NfACB1.2828257703547152
VcalPar
  • 3.627
  • 0.204
IrefTrim9
KSenseInA20814.391
KSenseInD21500.465
KSenseShuntA25770.19838095238
KSenseShuntD26619.623333333333
KShuntA1058.993
KShuntD1082.248

PixelConfig

Diff from previous revision 65736b5f35689ddfe79d0128

RD53B
Parameter
ADCcalPar
$insert
    • 0
    • 6.0
    • 1
    • 0.192
$delete
  • 1
  • 0