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20UPGFC0087226 Chip Configuration

Stage: MODULE/POST_PARYLENE_WARM

Branch: cold

Config: 655e582d3edcf47cdd8936b5

This Revision: 655e582d3edcf47cdd8936b6

Latest Revision: 657b51ab455ee9774c34f77f

Global Config

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3

DataMergeOutMux3	0
SerEnLane	8
SldoTrimA	8
SldoTrimD	5

Parameter

ADCcalPar	12.566 0.191 10000.0
Name	0x154ba
ChipId	14
InjCap	7.746
NfDSLDO	1.2865997914556448
NfASLDO	1.2847906316480049
NfACB	1.2829814718403645
VcalPar	4.835 0.204
IrefTrim	10
KSenseInA	21047.775
KSenseInD	21589.087

KSenseShuntA	26059.15
KSenseShuntD	26729.34580952381
KShuntA	1068.256
KShuntD	1033.795

PixelConfig

Diff from previous revision None

RD53B

GlobalConfig

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	1
DataMergeOutMux1	2
DataMergeOutMux2	3
DataMergeOutMux3	0
SerEnLane	8
SldoTrimA	8
SldoTrimD	5

Parameter

ADCcalPar	12.566 0.191 10000.0
Name	0x154ba
ChipId	14
InjCap	7.746
NfDSLDO	1.2865997914556448
NfASLDO	1.2847906316480049
NfACB	1.2829814718403645
VcalPar	4.835 0.204
IrefTrim	10
KSenseInA	21047.775
KSenseInD	21589.087
KSenseShuntA	26059.15
KSenseShuntD	26729.34580952381
KShuntA	1068.256
KShuntD	1033.795