20UPGFC0087226 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: LP

Config: 655d0548c1b043987a4017d5

This Revision: 655d0548c1b043987a4017d6

Latest Revision: 655d0548c1b043987a4017d6

Global Config

AuroraActiveLanes1
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV1
ServiceBlockEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane8
SldoTrimA8
SldoTrimD5

Parameter

ADCcalPar
  • 12.566
  • 0.191
  • 10000.0
Name0x154ba
ChipId14
InjCap7.746
NfDSLDO1.2865997914556448
NfASLDO1.2847906316480049
NfACB1.2829814718403645
VcalPar
  • 4.835
  • 0.204
IrefTrim10
KSenseInA21047.775
KSenseInD21589.087
KSenseShuntA26059.15
KSenseShuntD26729.34580952381
KShuntA1068.256
KShuntD1033.795

PixelConfig

Diff from previous revision 6556ee48d78c45303f33d35e

No diff is present.