20UPGFC0087194 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: LP

Config: 655d0539c1b043987a4017bb

This Revision: 655d0539c1b043987a4017bc

Latest Revision: 655d0539c1b043987a4017bc

Global Config

AuroraActiveLanes1
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV1
ServiceBlockEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux02
DataMergeOutMux13
DataMergeOutMux20
DataMergeOutMux31
SerEnLane4
SldoTrimA9
SldoTrimD8

Parameter

ADCcalPar
  • 6.603
  • 0.195
  • 10000.0
Name0x1549a
ChipId12
InjCap7.777
NfDSLDO1.2848766554438384
NfASLDO1.283598457016135
NfACB1.2816021695841033
VcalPar
  • 3.407
  • 0.208
IrefTrim10
KSenseInA21072.034
KSenseInD21756.235
KSenseShuntA26089.18495238095
KSenseShuntD26936.290952380954
KShuntA1067.238
KShuntD1068.089

PixelConfig

Diff from previous revision 6556ee43d78c45303f33d34c

No diff is present.