20UPGFC0087210 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 654288673faab532f97d1356

This Revision: 66f45b88ccf5a40aa86273be

Latest Revision: 66f6cd2b26024409f019738e

Global Config

AuroraActiveLanes1
CdrClkSel0
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV32
ServiceBlockEn1
ServiceBlockPeriod50
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane1
SldoTrimA10
SldoTrimD6

Parameter

ADCcalPar
  • 10.252
  • 0.19
  • 10000.0
Name0x154aa
ChipId13
InjCap7.68
NfDSLDO1.2867066834973793
NfASLDO1.2855430750908627
NfACB1.2833307825648927
VcalPar
  • 6.383
  • 0.205
IrefTrim10
KSenseInA21323.965
KSenseInD21836.127
KSenseShuntA26401.099523809524
KSenseShuntD27035.204857142857
KShuntA1052.258
KShuntD1058.307

PixelConfig

Diff from previous revision 6695c0341f90154eec9d9c8e

No diff is present.