20UPGFC0090726 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 65395a913598ab59a30e3a64

This Revision: 6539a9d03598ab59a30e3d6b

Latest Revision: 6539a9d03598ab59a30e3d6b

Global Config

AuroraActiveLanes1
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV1
ServiceBlockEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux01
DataMergeOutMux12
DataMergeOutMux23
DataMergeOutMux30
SerEnLane8
SldoTrimA4
SldoTrimD6

Parameter

ADCcalPar
  • 9.866
  • 0.193
  • 10000.0
Name0x16266
ChipId14
InjCap7.852
NfDSLDO-0.015637672243005996
NfASLDO-0.015637672243005996
NfACB-0.015637672243005996
VcalPar
  • 2.842
  • 0.207
IrefTrim15
KSenseInA21055.053
KSenseInD21368.922
KSenseShuntA26068.16085714286
KSenseShuntD26456.76057142857
KShuntA1118.943
KShuntD1042.845

PixelConfig

Diff from previous revision 65395a913598ab59a30e3a65

No diff is present.