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20UPGFC0087141 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: LP

Config: 653045dee34075ce6c46c993

This Revision: 653045dfe34075ce6c46c994

Latest Revision: 653045dfe34075ce6c46c994

Global Config

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	200
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2

DataMergeOutMux3	3
SerEnLane	1
SldoTrimA	10
SldoTrimD	9

Parameter

ADCcalPar	17.425 0.191 10000.0
Name	0x15465
ChipId	13
InjCap	7.618
NfDSLDO	1.2859911719436883
NfASLDO	1.2850001360378613
NfACB	1.2825584533713315
VcalPar	3.02 0.205
IrefTrim	10
KSenseInA	21095.981
KSenseInD	21615.147

KSenseShuntA	26118.83361904762
KSenseShuntD	26761.610571428573
KShuntA	1062.643
KShuntD	1049.04

PixelConfig

Diff from previous revision None

RD53B

GlobalConfig

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	200
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	1
SldoTrimA	10
SldoTrimD	9

Parameter

ADCcalPar	17.425 0.191 10000.0
Name	0x15465
ChipId	13
InjCap	7.618
NfDSLDO	1.2859911719436883
NfASLDO	1.2850001360378613
NfACB	1.2825584533713315
VcalPar	3.02 0.205
IrefTrim	10
KSenseInA	21095.981
KSenseInD	21615.147
KSenseShuntA	26118.83361904762
KSenseShuntD	26761.610571428573
KShuntA	1062.643
KShuntD	1049.04