20UPGFC0087141 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: warm

Config: 653045dee34075ce6c46c98f

This Revision: 653045dee34075ce6c46c990

Latest Revision: 653045dee34075ce6c46c990

Global Config

AuroraActiveLanes1
CmlBias0800
CmlBias1200
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV1
ServiceBlockEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane1
SldoTrimA10
SldoTrimD9

Parameter

ADCcalPar
  • 17.425
  • 0.191
  • 10000.0
Name0x15465
ChipId13
InjCap7.618
NfDSLDO1.2859911719436883
NfASLDO1.2850001360378613
NfACB1.2825584533713315
VcalPar
  • 3.02
  • 0.205
IrefTrim10
KSenseInA21095.981
KSenseInD21615.147
KSenseShuntA26118.83361904762
KSenseShuntD26761.610571428573
KShuntA1062.643
KShuntD1049.04

PixelConfig

Diff from previous revision None

RD53B
GlobalConfig
AuroraActiveLanes1
CmlBias0800
CmlBias1200
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV1
ServiceBlockEn1
DiffPreComp350
DiffPreampL550
DiffPreampM550
DiffPreampR550
DiffPreampT550
DiffPreampTL550
DiffPreampTR550
DiffVff60
EnCoreCol065535
EnCoreCol165535
EnCoreCol265535
EnCoreCol363
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane1
SldoTrimA10
SldoTrimD9
Parameter
ADCcalPar
  • 17.425
  • 0.191
  • 10000.0
Name0x15465
ChipId13
InjCap7.618
NfDSLDO1.2859911719436883
NfASLDO1.2850001360378613
NfACB1.2825584533713315
VcalPar
  • 3.02
  • 0.205
IrefTrim10
KSenseInA21095.981
KSenseInD21615.147
KSenseShuntA26118.83361904762
KSenseShuntD26761.610571428573
KShuntA1062.643
KShuntD1049.04