20UPGFC0078012 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 652ed686902554c217092f7b

This Revision: 658228dedf900555e744fa29

Latest Revision: 658228dedf900555e744fa29

Global Config

AuroraActiveLanes1
CmlBias0800
CmlBias1400
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV1
ServiceBlockEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux02
DataMergeOutMux13
DataMergeOutMux20
DataMergeOutMux31
SerEnLane4
SldoTrimA9
SldoTrimD8

Parameter

ADCcalPar
  • 14.901
  • 0.192
  • 10000.0
Name0x130bc
ChipId12
InjCap8.139
NfDSLDO-0.015637672243005996
NfASLDO-0.015637672243005996
NfACB-0.015637672243005996
VcalPar
  • 1.97
  • 0.207
IrefTrim12
KSenseInA20967.602
KSenseInD21129.558
KSenseShuntA25959.88819047619
KSenseShuntD26160.405142857144
KShuntA1071.399
KShuntD1034.13

PixelConfig

Diff from previous revision 6582284adf900555e744fa05

No diff is present.