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20UPGFC0087146 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 64e51b61fc7088729756ae01

This Revision: 64e51b61fc7088729756ae02

Latest Revision: 64e51b61fc7088729756ae02

Global Config

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2

DataMergeOutMux3	3
SerEnLane	1
SldoTrimA	9
SldoTrimD	6

Parameter

ADCcalPar	10.932 0.197 10000.0
Name	0x1546a
ChipId	13
InjCap	7.76
NfDSLDO	1.2847371389106024
NfASLDO	1.2838751691882038
NfACB	1.2816053155858884
VcalPar	5.046 0.212
IrefTrim	10
KSenseInA	21367.153
KSenseInD	21605.001

KSenseShuntA	26454.57038095238
KSenseShuntD	26749.048857142858
KShuntA	1055.555
KShuntD	1012.347

PixelConfig

Diff from previous revision None

RD53B

GlobalConfig

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	1
SldoTrimA	9
SldoTrimD	6

Parameter

ADCcalPar	10.932 0.197 10000.0
Name	0x1546a
ChipId	13
InjCap	7.76
NfDSLDO	1.2847371389106024
NfASLDO	1.2838751691882038
NfACB	1.2816053155858884
VcalPar	5.046 0.212
IrefTrim	10
KSenseInA	21367.153
KSenseInD	21605.001
KSenseShuntA	26454.57038095238
KSenseShuntD	26749.048857142858
KShuntA	1055.555
KShuntD	1012.347