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20UPGFC0087130 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: warm

Config: 64e51b5dfc7088729756adef

This Revision: 64e51b5dfc7088729756adf0

Latest Revision: 65171c9f242a8062d542ea17

Global Config

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0

DataMergeOutMux3	1
SerEnLane	4
SldoTrimA	8
SldoTrimD	5

Parameter

ADCcalPar	13.763 0.187 10000.0
Name	0x1545a
ChipId	12
InjCap	7.63
NfDSLDO	1.2852485844227992
NfASLDO	1.2849325479313072
NfACB	1.2824329865895066
VcalPar	4.11 0.201
IrefTrim	13
KSenseInA	21293.772
KSenseInD	21549.993

KSenseShuntA	26363.717714285714
KSenseShuntD	26680.943714285713
KShuntA	1077.569
KShuntD	1021.066

PixelConfig

Diff from previous revision None

RD53B

GlobalConfig

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	400
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	350
DiffPreampL	550
DiffPreampM	550
DiffPreampR	550
DiffPreampT	550
DiffPreampTL	550
DiffPreampTR	550
DiffVff	60
EnCoreCol0	65535
EnCoreCol1	65535
EnCoreCol2	65535
EnCoreCol3	63
DataMergeOutMux0	2
DataMergeOutMux1	3
DataMergeOutMux2	0
DataMergeOutMux3	1
SerEnLane	4
SldoTrimA	8
SldoTrimD	5

Parameter

ADCcalPar	13.763 0.187 10000.0
Name	0x1545a
ChipId	12
InjCap	7.63
NfDSLDO	1.2852485844227992
NfASLDO	1.2849325479313072
NfACB	1.2824329865895066
VcalPar	4.11 0.201
IrefTrim	13
KSenseInA	21293.772
KSenseInD	21549.993
KSenseShuntA	26363.717714285714
KSenseShuntD	26680.943714285713
KShuntA	1077.569
KShuntD	1021.066