20UPGFC0087141 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 646c05ac860c8139aedf82a5

This Revision: 65f208a5aa59dc167b4d1911

Latest Revision: 65f21befaa59dc167b4d1ae5

Global Config

AuroraActiveLanes1
CmlBias0800
CmlBias1200
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV1
ServiceBlockEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux00
DataMergeOutMux11
DataMergeOutMux22
DataMergeOutMux33
SerEnLane1
SldoTrimA10
SldoTrimD9

Parameter

ADCcalPar
  • 17.425
  • 0.191
  • 10000.0
Name0x15465
ChipId13
InjCap7.618
NfDSLDO1.2859911719436883
NfASLDO1.2850001360378613
NfACB1.2825584533713315
VcalPar
  • 3.02
  • 0.205
IrefTrim10
KSenseInA21095.981
KSenseInD21615.147
KSenseShuntA26118.83361904762
KSenseShuntD26761.610571428573
KShuntA1062.643
KShuntD1049.04

PixelConfig

Diff from previous revision 65f1df95d29db8ca81296926

No diff is present.