20UPGFC0086650 Chip Configuration

Stage: MODULE/INITIAL_COLD

Branch: LP

Config: 6468ed389f9ea6946fc960ec

This Revision: 646d52dad1945d573694feda

Latest Revision: 657b3ff0e4792de733f32261

Global Config

AuroraActiveLanes1
CmlBias0800
CmlBias1200
CmlBias20
SerEnTap1
SerInvTap1
MonitorEnable1
MonitorI63
MonitorV1
ServiceBlockEn1
DiffPreComp0
DiffPreampL0
DiffPreampM0
DiffPreampR0
DiffPreampT0
DiffPreampTL0
DiffPreampTR0
DiffVff0
EnCoreCol00
EnCoreCol10
EnCoreCol20
EnCoreCol30
DataMergeOutMux02
DataMergeOutMux13
DataMergeOutMux20
DataMergeOutMux31
SerEnLane4
SldoTrimA8
SldoTrimD7

Parameter

ADCcalPar
  • 10.679
  • 0.176
  • 10000.0
Name0x1527a
ChipId12
InjCap7.909
NfDSLDO1.2845641001615977
NfASLDO1.2842770435240574
NfACB1.2822245885656431
VcalPar
  • 3.053
  • 0.189
IrefTrim13
KSenseInA21285.228
KSenseInD21708.888
KSenseShuntA26353.139428571427
KSenseShuntD26877.670857142857
KShuntA1094.736
KShuntD1085.321

PixelConfig

Diff from previous revision 646901989f9ea6946fc96187

No diff is present.