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20UPGFC0086649 Chip Configuration

Stage: MODULE/INITIAL_WARM

Branch: LP

Config: 6466564f6050bd2ad2ac3691

This Revision: 6466564f6050bd2ad2ac3692

Latest Revision: 652f5dfa98262c9e8e515a77

Global Config

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	200
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2

DataMergeOutMux3	3
SerEnLane	1
SldoTrimA	13
SldoTrimD	7

Parameter

ADCcalPar	12.836 0.182 10000.0
Name	0x15279
ChipId	15
InjCap	7.836
NfDSLDO	1.2838506017935223
NfASLDO	1.2829032165104457
NfACB	1.2810228002667632
VcalPar	1.171 0.195
IrefTrim	8
KSenseInA	21163.388
KSenseInD	21542.769

KSenseShuntA	26202.289904761903
KSenseShuntD	26671.999714285714
KShuntA	1074.883
KShuntD	1069.974

PixelConfig

Diff from previous revision None

RD53B

GlobalConfig

AuroraActiveLanes	1
CmlBias0	800
CmlBias1	200
CmlBias2	0
SerEnTap	1
SerInvTap	1
MonitorEnable	1
MonitorI	63
MonitorV	1
ServiceBlockEn	1
DiffPreComp	0
DiffPreampL	0
DiffPreampM	0
DiffPreampR	0
DiffPreampT	0
DiffPreampTL	0
DiffPreampTR	0
DiffVff	0
EnCoreCol0	0
EnCoreCol1	0
EnCoreCol2	0
EnCoreCol3	0
DataMergeOutMux0	0
DataMergeOutMux1	1
DataMergeOutMux2	2
DataMergeOutMux3	3
SerEnLane	1
SldoTrimA	13
SldoTrimD	7

Parameter

ADCcalPar	12.836 0.182 10000.0
Name	0x15279
ChipId	15
InjCap	7.836
NfDSLDO	1.2838506017935223
NfASLDO	1.2829032165104457
NfACB	1.2810228002667632
VcalPar	1.171 0.195
IrefTrim	8
KSenseInA	21163.388
KSenseInD	21542.769
KSenseShuntA	26202.289904761903
KSenseShuntD	26671.999714285714
KShuntA	1074.883
KShuntD	1069.974