20UPGPQ2210493

OB_LOADED_MODULE_CELL/LLS_RECEPTION

Component Information

Serial Number	20UPGPQ2210493
ProdDB ID	367ae0…77f5b3
LocalDB ID	65f0e4adbb920b0035f65fca
Component Type	MODULE_PCB
Parents	20UPGM23210493
Children	No match.
Flags

Damaged during handling

Other issues

Too dirty to be used

Brown marks on traces

Additional cleaning done

Has misplaced pads due to solder mask issue

Used for dummy modules

Used for PCB QA

Properties

Item	Value
PCB Manufacturer	NCAB
PCB design version readonly	2
PCB vendor technology readonly	2
SMD population vendor	Garner Osborne Circuits
PCB BOM version	12

Comments

Test: VISUAL_INSPECTION QC Passed

(Stage: PCB_RECEPTION_MODULE_SITE)

Basic View Only: custom view for this TestRun is not prepared.

Metadata

Key	Data
QC Passed	True
Date	a year ago
component ObjectId	65f0e4adbb920b0035f65fca
Stage	PCB_RECEPTION_MODULE_SITE
Test Type	VISUAL_INSPECTION
Institute ObjectId
User Name	PaulMickael Chabrillat
ObjectId of this record	67111a3eeff9780043ae7418
ObjectId of RAW record	None
Tags	No tags

Results

Key	Data
ANALYSIS_VERSION	mqat vNone
INSTRUMENT	None
OPERATOR	None
COMPONENT_MISALIGNMENT_GRADE	N/A
DATA_CONNECTOR_ASSEMBLY_GRADE	N/A
HV_LV_CONNECTOR_ASSEMBLY_GRADE	N/A
OBSERVATION	Very clean flex
OPENS_TOMBSTONING_GRADE	N/A
OVERALL_GRADE	1
PARTICULATE_CONTAMINATION_GRADE	N/A
SCRATCHES_GRADE	N/A
SHORTS_OR_CLOSE_PROXIMITY_GRADE	N/A
SOLDERMASK_IRREGULARITIES_GRADE	N/A
SOLDER_SPILLS_GRADE	N/A
TRACES_GRADE	N/A
WATERMARKS_GRADE	N/A
WIREBOND_PADS_CONTAMINATION_GRADE	N/A

ProductionDB Record

Expand ProductionDB Record

67111a3eeff9780043ae7418

state

ready

stateTs

2024-10-17T14:07:58.184Z

stateUserIdentity

9291-3358-1

date

2024-10-17T14:07:00.000Z

testType

id	5f644fba928ccc000ad1215f
code	VISUAL_INSPECTION
name	Visual Inspection
state	active

institution

id	5d42fb891fd678000a409866
code	LPNHE
name	Laboratoire de Physique Nucléaire et de Hautes Energies

user

id	62fb7d122d8fbc000ac46493
userIdentity	9291-3358-1
firstName	Paul
middleName
lastName	Mickael Chabrillat

runNumber

passed

True

problems

False

properties

code	name	dataType	valueType	required	value	rangeMin	rangeMax
ANALYSIS_VERSION	Analysis version	string	single	False	None	None	None
INSTRUMENT	Instrument	string	single	False	None	None	None
OPERATOR	Operator	string	single	False	None	None	None

results

code COMPONENT_MISALIGNMENT_GRADE
name Component misalignment (scale 1-3)
dataType integer
valueType single
arrayDimensions None
additional False
value None
associateChild None
code DATA_CONNECTOR_ASSEMBLY_GRADE
name Data connector assembly issue (scale 1-3)
dataType integer
valueType single
arrayDimensions None
additional False
value None
associateChild None
code HV_LV_CONNECTOR_ASSEMBLY_GRADE
name HV LV connector assembly issue (scale 1-3)
dataType integer
valueType single
arrayDimensions None
additional False
value None
associateChild None
code OBSERVATION
name Observation
dataType string
valueType single
arrayDimensions None
additional False
value Very clean flex
associateChild None

code	OPENS_TOMBSTONING_GRADE
name	Opens or tombstoning, where one end of the component lifts from a pad of the PCB during the soldering process, (scale 1-3)
dataType	integer
valueType	single
arrayDimensions	None
additional	False
rangeMin	None
rangeMax	None
value	None
associateChild	None

code OVERALL_GRADE
name Overall grade (scale 1-3)
dataType integer
valueType single
arrayDimensions None
additional False
value 1
associateChild None

code	PARTICULATE_CONTAMINATION_GRADE
name	Particulate contamination on the PCB including pick-up points (scale 1-3)
dataType	integer
valueType	single
arrayDimensions	None
additional	False
value	None
associateChild	None

code	SCRATCHES_GRADE
name	Scratches on the wirebonding pads and the PCD that can cause issues with wirebonding and/or electrical functionality of the PCB (scale 1-3)
dataType	integer
valueType	single
arrayDimensions	None
additional	False
value	None
associateChild	None

code SHORTS_OR_CLOSE_PROXIMITY_GRADE
name Shorts/close proximity of components due to misalignment (scale 1-3)
dataType integer
valueType single
arrayDimensions None
additional False
value None
associateChild None
code SOLDERMASK_IRREGULARITIES_GRADE
name Soldermask irregularity/cracks grade (scale 1-3)
dataType integer
valueType single
arrayDimensions None
additional False
value None
associateChild None
code SOLDER_SPILLS_GRADE
name Solder spills as part of assembly process on wirebonding pads (scale 1-3)
dataType integer
valueType single
arrayDimensions None
additional False
value None
associateChild None

code	TRACES_GRADE
name	Issues seen on traces like spurious copper, spur, mousebit, pin hole, short, breakout etc. that reduce/cut the copper traces width (grade 1-3)
dataType	integer
valueType	single
arrayDimensions	None
additional	False
rangeMin	None
rangeMax	None
value	None
associateChild	None

code WATERMARKS_GRADE
name Watermarks on the PCB (scale 1-3)
dataType integer
valueType single
arrayDimensions None
additional False
value None
associateChild None

code	WIREBOND_PADS_CONTAMINATION_GRADE
name	Wirebond pads clear of contamination, discolouring, spills, deposits, particles, etc that can cause issues with wirebonding(scale 1-3)
dataType	integer
valueType	single
arrayDimensions	None
additional	False
value	None
associateChild	None

cts

2024-10-17T14:07:58.184Z

sys

cts	2024-10-17T14:07:58.184Z
mts	2024-10-17T14:12:21.190Z
rev	1

defects

comments

code

dateTime

comment

user

18625ccc37cc66d77a9b9047

2024-10-17T14:12:21.190Z

<uu5string />Link to the photo :<br />https://cernbox.cern.ch/s/hpgg2GIZp0BVFPs

id	62fb7d122d8fbc000ac46493
userIdentity	9291-3358-1
firstName	Paul
middleName
lastName	Mickael Chabrillat

attachments

components

code

state

stateTs

stateUserIdentity

dummy

completed

completedTs

completedUserIdentity

trashed

trashedTs

trashedUserIdentity

serialNumber

alternativeIdentifier

ancestorMap

project

subproject

componentType

type

properties

testedAtStage

institution

65f0e4adbb920b0035f65fca

367ae031a4271c8ccb6a74a36377f5b3

ready

2024-03-12T23:26:37.408Z

2355-570-1

False

None

False

None

20UPGPQ2210493

None

parent

component

6710b781eff9780043ad2f66

code

a3408c805ec2e2d4c28203e1b408c43a

state

ready

stateTs

2024-10-17T07:06:41.688Z

stateUserIdentity

9086-39-1

dummy

False

completed

False

completedTs

None

completedUserIdentity

None

trashed

False

trashedTs

None

trashedUserIdentity

None

serialNumber

20UPGM23210493

alternativeIdentifier

PPPV2_09

project

code	P
name	Pixels

subproject

code	PG
name	Pixel general

componentType

code	MODULE
name	Module

type

code	OUTER_SYSTEM_QUAD_MODULE
name	Outer system quad module

testedAtStage

code	MODULE/ASSEMBLY
name	Bare module to module PCB assembly

highestLevelParent

component

6710b781eff9780043ad2f66

code

a3408c805ec2e2d4c28203e1b408c43a

state

ready

stateTs

2024-10-17T07:06:41.688Z

stateUserIdentity

9086-39-1

dummy

False

completed

False

completedTs

None

completedUserIdentity

None

trashed

False

trashedTs

None

trashedUserIdentity

None

serialNumber

20UPGM23210493

alternativeIdentifier

PPPV2_09

project

code	P
name	Pixels

subproject

code	PG
name	Pixel general

componentType

code	MODULE
name	Module

type

code	OUTER_SYSTEM_QUAD_MODULE
name	Outer system quad module

testedAtStage

code	MODULE/ASSEMBLY
name	Bare module to module PCB assembly

code	P
name	Pixels

code	PG
name	Pixel general

code	PCB
name	Module PCB

code	QUAD_PCB
name	Quad PCB

code PCB_MANUFACTURER
name PCB Manufacturer
dataType string
required True
default False
value NCAB

code

PCB_DESIGN_VERSION

name

PCB design version

dataType

codeTable

required

True

default

False

value

Preproduction OS

codeTable

code	value
0	RD53A
1	Prototype
2	Preproduction OS
3	Preproduction IS
4	Production OS
5	Production IS
9	No chip

code

PCB_VENDOR_TECHNOLOGY

name

PCB vendor technology

dataType

codeTable

required

True

default

False

value

NCAB (100 mum trace)

codeTable

code	value
1	EPEC (100 mum trace)
2	NCAB (100 mum trace)
3	ALTAFLEX (75 mum trace)
4	SFCircuits (100 mum trace)
5	PHOENIX (100 mum trae)
6	Yamashita Material (75 mum trace)
7	NCAB (75 mum trace)
8	Tecnomec (100 mum trace)

code SMD_POPULATION_VENDOR
name SMD population vendor
dataType string
required False
default False
value Garner Osborne Circuits
code PCB_BOM_VERSION
name PCB BOM version
dataType codeTable
required False
default False
value V1.1 L2
codeTable
code value
10 V1.1 L0
11 V1.1 L1
12 V1.1 L2
20 V2 L0
21 V2 L1
22 V2 L2

code	PCB_RECEPTION_MODULE_SITE
name	PCB Reception at module site
order	12
initial	False
final	False

code	EDI
name	University of Edinburgh

Stage code OB_LOADED_MODULE_CELL/LLS_RECEPTION is not defined for this component type.

Current Stage:

No tests are allocated for this stage.

Past QC Stages and Results

Insertion of pigtail and strain relief glueing (OB_LOADED_MODULE_CELL/PIGTAIL_INSERTION)

Module PCB tab cutting (in Combined Method) (OB_LOADED_MODULE_CELL/TAB_CUTTING)

Reception at Cell Integration Sites (OB_LOADED_MODULE_CELL/RECEPTION)

OB Loaded Module Cell Complete (OB_LOADED_MODULE_CELL/COMPLETE)

OB Loaded Module Cells failed test, needs investigation (OB_LOADED_MODULE_CELL/UNHAPPY)

Grading of OB Loaded Module Cells (OB_LOADED_MODULE_CELL/QC_STATUS)

Envelope Check (OB_LOADED_MODULE_CELL/ENVELOPE_CHECK)

Thermal Conductivity Test at Warm Temperature (OB_LOADED_MODULE_CELL/THERMAL_WARM)

Thermal Conductivity Test at Cold Temperature (OB_LOADED_MODULE_CELL/THERMAL_COLD)

Electrical Tests at Cold Temperature (OB_LOADED_MODULE_CELL/FINAL_COLD)

Electrical Tests at Warm Temperature (OB_LOADED_MODULE_CELL/FINAL_WARM)

Cold Cycle (OB_LOADED_MODULE_CELL/THERMAL_CYCLES)

Module to cell assembly (OB_LOADED_MODULE_CELL/ASSEMBLY)

Initial state to associate bare cell to module (OB_LOADED_MODULE_CELL/INIT)

Electrical testing at reception of LLS (LLS/RECEPTION)

Electrical testing on LLS at cold temperature (LLS/POST_TC_COLD)

Electrical testing on LLS at warm temperature (LLS/POST_TC_WARM)

Electrical testing before thermal cycling on LLS at cold temperature (LLS/PRE_TC_COLD)

Electrical testing before thermal cycling on LLS at warm temperature (LLS/PRE_TC_WARM)

Module PCB tab cutting (MODULE/TAB_CUTTING)

Module reception (MODULE/RECEPTION)

Module Complete (MODULE/COMPLETE)

Modules damaged, impossible to recover (MODULE/GRAVEYARD)

Stage for QA modules and others not to be considered in yield calculation (MODULE/NOTCONSIDEREDINYIELDS)

Modules failed test, needs investigation (MODULE/UNHAPPY)

Ranking of the module (MODULE/QC_STATUS)

Final flatness measurement (MODULE/FINAL_METROLOGY)

Final Cold (MODULE/FINAL_COLD)

Final Warm (MODULE/FINAL_WARM)

Long Term Stability Test (MODULE/LONG_TERM_STABILITY_TEST)

Thermal Cycles (MODULE/THERMAL_CYCLES)

Post-Parylene Cold (MODULE/POST_PARYLENE_COLD)

Post-Parylene Warm (MODULE/POST_PARYLENE_WARM)

Wirebond Protection (alt) (MODULE/WIREBOND_PROTECTION)

Parylene Unmasking (MODULE/PARYLENE_UNMASKING)

Parylene Coating (MODULE/PARYLENE_COATING)

Parylene Masking (MODULE/PARYLENE_MASKING)

Initial Cold (MODULE/INITIAL_COLD)

QC cross-check (module swapping) (MODULE/QC_CROSSCHECK)

Initial Warm (MODULE/INITIAL_WARM)

Wire Bonding (MODULE/WIREBONDING)

Bare module to module PCB assembly (MODULE/ASSEMBLY)

Initial state to associate flex to bare module (MODULE/INIT)

Complete (COMPLETE)

PCB Reception at module site (PCB_RECEPTION_MODULE_SITE)

Test	Local Result	ProdDB Record
Mass (MASS)	Registered	Registered
Metrology (METROLOGY)	Registered	Registered
Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY)	No result	N/A
Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)	No result	N/A
Visual Inspection (VISUAL_INSPECTION)	Registered	Registered

PCB ready for module (PCB_READY_FOR_MODULE)

PCB impossible to recover (PCB/GRAVEYARD)

Test failed, needs investigation (UNHAPPY)

QC (PCB_QC)

Test	Local Result	ProdDB Record
Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK)	No result	N/A
LV and HV Test (HV_LV_TEST)	Registered	Registered
Tab cutting and gross defect inspection (QUICK_TAB_CUTTING_INSPECTION)	No result	N/A

QA post radiation cycle (QA_POST_RADIATION_CYCLE)

Test	Local Result	ProdDB Record
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A

QA post radiation post thermal cycle QC (QA_POST_RADIATION_POST_THERMAL_CYCLE)

Test	Local Result	ProdDB Record
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A

QA pre-radiation cycle (QA_PRE_RADIATION_CYCLE)

Test	Local Result	ProdDB Record
LV and HV Test (HV_LV_TEST)	No result	N/A
Metrology (METROLOGY)	No result	N/A
NTC Verification (NTC_VERIFICATION)	No result	N/A
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
SLDO and precision resistors (SLDO_RESISTORS)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Wirebond pull test (WIREBOND_PULL_TEST)	No result	N/A

QA post-thermal cycle / thermal shock (QA_POST_THERMAL_CYCLE)

Test	Local Result	ProdDB Record
LV and HV Test (HV_LV_TEST)	No result	N/A
NTC Verification (NTC_VERIFICATION)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Wirebond pull test (WIREBOND_PULL_TEST)	No result	N/A

QA pre-thermal cycle / thermal shock (QA_PRE_THERMAL_CYCLE)

Test	Local Result	ProdDB Record
LV and HV Test (HV_LV_TEST)	No result	N/A
Metrology (METROLOGY)	No result	N/A
NTC Verification (NTC_VERIFICATION)	No result	N/A
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
SLDO and precision resistors (SLDO_RESISTORS)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Wirebond pull test (WIREBOND_PULL_TEST)	No result	N/A

Population (PCB_POPULATION)

Test	Local Result	ProdDB Record
Component Position Check (COMPONENT_POSITION_CHECK)	No result	N/A
Visual Inspection (VISUAL_INSPECTION)	No result	N/A

PCB being populated (PCB_BEING_POPULATED)

Reception (PCB_RECEPTION)

Test	Local Result	ProdDB Record
Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK)	No result	N/A
Image capture test (IMAGE_CAPTURE_TEST)	No result	N/A
Layer thickness measurement (LAYER_THICKNESS)	No result	N/A
Metrology (METROLOGY)	No result	N/A
Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY)	No result	N/A
Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Visual Inspection (VISUAL_INSPECTION)	No result	N/A

Bare PCB Initial (PCB_INIT)

LocalDB Test ID	Stage	Test Name	Inspector	Measurement Date	Analysis Date	Tags	QC Registration
67111a…ae7418	PCB_RECEPTION_MODULE_SITE	VISUAL_INSPECTION	PaulMickael Chabrillat	N/A	a year ago	No tags	Selected
66fc2c…c35e82	PCB_RECEPTION_MODULE_SITE	METROLOGY	PaulMickael Chabrillat	N/A	a year ago	No tags	Selected
66fc2c…c49d65	PCB_RECEPTION_MODULE_SITE	MASS	PaulMickael Chabrillat	N/A	a year ago	No tags	Selected
66e12d…a3817d	PCB_QC	HV_LV_TEST	FuatUstuner	N/A	a year ago	No tags	Selected

Stage	Tests
PCB_INIT
PCB_RECEPTION	Visual Inspection (VISUAL_INSPECTION) Metrology (METROLOGY) Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK) Layer thickness measurement (LAYER_THICKNESS) Image capture test (IMAGE_CAPTURE_TEST) Via resistance (VIA_RESISTANCE) Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY) Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)
PCB_BEING_POPULATED
PCB_POPULATION	Visual Inspection (VISUAL_INSPECTION) Component Position Check (COMPONENT_POSITION_CHECK)
QA_PRE_THERMAL_CYCLE	SLDO and precision resistors (SLDO_RESISTORS) NTC Verification (NTC_VERIFICATION) Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE) Metrology (METROLOGY) LV and HV Test (HV_LV_TEST) Wirebond pull test (WIREBOND_PULL_TEST)
QA_POST_THERMAL_CYCLE	NTC Verification (NTC_VERIFICATION) Via resistance (VIA_RESISTANCE) LV and HV Test (HV_LV_TEST) Wirebond pull test (WIREBOND_PULL_TEST)
QA_PRE_RADIATION_CYCLE	Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE) Metrology (METROLOGY) SLDO and precision resistors (SLDO_RESISTORS) NTC Verification (NTC_VERIFICATION) Wirebond pull test (WIREBOND_PULL_TEST) LV and HV Test (HV_LV_TEST)
QA_POST_RADIATION_POST_THERMAL_CYCLE	Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE)
QA_POST_RADIATION_CYCLE	Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE)
PCB_QC	LV and HV Test (HV_LV_TEST) Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK) Tab cutting and gross defect inspection (QUICK_TAB_CUTTING_INSPECTION)
UNHAPPY
PCB/GRAVEYARD
PCB_READY_FOR_MODULE
PCB_RECEPTION_MODULE_SITE	Visual Inspection (VISUAL_INSPECTION) Mass (MASS) Metrology (METROLOGY) Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY) Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)
COMPLETE
MODULE/INIT
MODULE/ASSEMBLY
MODULE/WIREBONDING
MODULE/INITIAL_WARM
MODULE/QC_CROSSCHECK
MODULE/INITIAL_COLD
MODULE/PARYLENE_MASKING
MODULE/PARYLENE_COATING
MODULE/PARYLENE_UNMASKING
MODULE/WIREBOND_PROTECTION
MODULE/POST_PARYLENE_WARM
MODULE/POST_PARYLENE_COLD
MODULE/THERMAL_CYCLES
MODULE/LONG_TERM_STABILITY_TEST
MODULE/FINAL_WARM
MODULE/FINAL_COLD
MODULE/FINAL_METROLOGY
MODULE/QC_STATUS
MODULE/UNHAPPY
MODULE/NOTCONSIDEREDINYIELDS
MODULE/GRAVEYARD
MODULE/COMPLETE
MODULE/RECEPTION
MODULE/TAB_CUTTING
LLS/PRE_TC_WARM
LLS/PRE_TC_COLD
LLS/POST_TC_WARM
LLS/POST_TC_COLD
LLS/RECEPTION
OB_LOADED_MODULE_CELL/INIT
OB_LOADED_MODULE_CELL/ASSEMBLY
OB_LOADED_MODULE_CELL/THERMAL_CYCLES
OB_LOADED_MODULE_CELL/FINAL_WARM
OB_LOADED_MODULE_CELL/FINAL_COLD
OB_LOADED_MODULE_CELL/THERMAL_COLD
OB_LOADED_MODULE_CELL/THERMAL_WARM
OB_LOADED_MODULE_CELL/ENVELOPE_CHECK
OB_LOADED_MODULE_CELL/QC_STATUS
OB_LOADED_MODULE_CELL/UNHAPPY
OB_LOADED_MODULE_CELL/COMPLETE
OB_LOADED_MODULE_CELL/RECEPTION
OB_LOADED_MODULE_CELL/TAB_CUTTING
OB_LOADED_MODULE_CELL/PIGTAIL_INSERTION

20UPGPQ2210493

OB_LOADED_MODULE_CELL/LLS_RECEPTION

Component Information

Properties

Comments

Test: VISUAL_INSPECTION QC Passed

(Stage: PCB_RECEPTION_MODULE_SITE)

Basic View Only: custom view for this TestRun is not prepared.

Metadata

Results

ProductionDB Record

Current Stage:

Past QC Stages and Results

Insertion of pigtail and strain relief glueing (OB_LOADED_MODULE_CELL/PIGTAIL_INSERTION)

Module PCB tab cutting (in Combined Method) (OB_LOADED_MODULE_CELL/TAB_CUTTING)

Reception at Cell Integration Sites (OB_LOADED_MODULE_CELL/RECEPTION)

OB Loaded Module Cell Complete (OB_LOADED_MODULE_CELL/COMPLETE)

OB Loaded Module Cells failed test, needs investigation (OB_LOADED_MODULE_CELL/UNHAPPY)

Grading of OB Loaded Module Cells (OB_LOADED_MODULE_CELL/QC_STATUS)

Envelope Check (OB_LOADED_MODULE_CELL/ENVELOPE_CHECK)

Thermal Conductivity Test at Warm Temperature (OB_LOADED_MODULE_CELL/THERMAL_WARM)

Thermal Conductivity Test at Cold Temperature (OB_LOADED_MODULE_CELL/THERMAL_COLD)

Electrical Tests at Cold Temperature (OB_LOADED_MODULE_CELL/FINAL_COLD)

Electrical Tests at Warm Temperature (OB_LOADED_MODULE_CELL/FINAL_WARM)

Cold Cycle (OB_LOADED_MODULE_CELL/THERMAL_CYCLES)

Module to cell assembly (OB_LOADED_MODULE_CELL/ASSEMBLY)

Initial state to associate bare cell to module (OB_LOADED_MODULE_CELL/INIT)

Electrical testing at reception of LLS (LLS/RECEPTION)

Electrical testing on LLS at cold temperature (LLS/POST_TC_COLD)

Electrical testing on LLS at warm temperature (LLS/POST_TC_WARM)

Electrical testing before thermal cycling on LLS at cold temperature (LLS/PRE_TC_COLD)

Electrical testing before thermal cycling on LLS at warm temperature (LLS/PRE_TC_WARM)

Module PCB tab cutting (MODULE/TAB_CUTTING)

Module reception (MODULE/RECEPTION)

Module Complete (MODULE/COMPLETE)

Modules damaged, impossible to recover (MODULE/GRAVEYARD)

Stage for QA modules and others not to be considered in yield calculation (MODULE/NOTCONSIDEREDINYIELDS)

Modules failed test, needs investigation (MODULE/UNHAPPY)

Ranking of the module (MODULE/QC_STATUS)

Final flatness measurement (MODULE/FINAL_METROLOGY)

Final Cold (MODULE/FINAL_COLD)

Final Warm (MODULE/FINAL_WARM)

Long Term Stability Test (MODULE/LONG_TERM_STABILITY_TEST)

Thermal Cycles (MODULE/THERMAL_CYCLES)

Post-Parylene Cold (MODULE/POST_PARYLENE_COLD)

Post-Parylene Warm (MODULE/POST_PARYLENE_WARM)

Wirebond Protection (alt) (MODULE/WIREBOND_PROTECTION)

Parylene Unmasking (MODULE/PARYLENE_UNMASKING)

Parylene Coating (MODULE/PARYLENE_COATING)

Parylene Masking (MODULE/PARYLENE_MASKING)

Initial Cold (MODULE/INITIAL_COLD)

QC cross-check (module swapping) (MODULE/QC_CROSSCHECK)

Initial Warm (MODULE/INITIAL_WARM)

Wire Bonding (MODULE/WIREBONDING)

Bare module to module PCB assembly (MODULE/ASSEMBLY)

Initial state to associate flex to bare module (MODULE/INIT)

Complete (COMPLETE)

PCB Reception at module site (PCB_RECEPTION_MODULE_SITE)

PCB ready for module (PCB_READY_FOR_MODULE)

PCB impossible to recover (PCB/GRAVEYARD)

Test failed, needs investigation (UNHAPPY)

QC (PCB_QC)

QA post radiation cycle (QA_POST_RADIATION_CYCLE)

QA post radiation post thermal cycle QC (QA_POST_RADIATION_POST_THERMAL_CYCLE)

QA pre-radiation cycle (QA_PRE_RADIATION_CYCLE)

QA post-thermal cycle / thermal shock (QA_POST_THERMAL_CYCLE)

QA pre-thermal cycle / thermal shock (QA_PRE_THERMAL_CYCLE)

Population (PCB_POPULATION)

PCB being populated (PCB_BEING_POPULATED)

Reception (PCB_RECEPTION)

Bare PCB Initial (PCB_INIT)

All Registered QC Tests

Check QC Flow

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