20UPGPQ4220565

MODULE/UNHAPPY

Component Information

Serial Number	20UPGPQ4220565
ProdDB ID	ca5788…cebeb4
LocalDB ID	67f4ba2d69bd7fedf7802096
Component Type	MODULE_PCB
Parents	20UPGM24220565
Children	No match.
Flags

Damaged during handling

Other issues

Too dirty to be used

Brown marks on traces

Additional cleaning done

Has misplaced pads due to solder mask issue

Used for dummy modules

Used for PCB QA

Properties

Item	Value
PCB Manufacturer	NCAB
PCB design version readonly	4
PCB vendor technology readonly	2
SMD population vendor	Garner Osborne Circuits
PCB BOM version	22

Comments

Test: LAYER_THICKNESS QC Passed

(Stage: PCB_RECEPTION)

Basic View Only: custom view for this TestRun is not prepared.

Metadata

Key	Data
QC Passed	True
Date	a year ago
component ObjectId	67f4ba2d69bd7fedf7802096
Stage	PCB_RECEPTION
Test Type	LAYER_THICKNESS
Institute ObjectId
User Name	SnehaAmogh Naik
ObjectId of this record	681d2c6f5631bb896b8d7e48
ObjectId of RAW record	None
Tags	No tags

Results

Key	Data
OPERATOR	C. Lickley
INSTRUMENT	Mitutoyo Linear Gauge LG-130E
ANALYSIS_VERSION	mqat v1.0
TOP_LAYER_THICKNESS	32
INNER_LAYER_THICKNESS	13
BOTTOM_LAYER_THICKNESS	30
DIELECTRIC_THICKNESS	120
COVERLAY_WITH_ADHESIVE_THICKNESS	53
THICKNESS	257
CU_THICKNESS	29.66

ProductionDB Record

Expand ProductionDB Record

681d2c6f5631bb896b8d7e48

state

ready

stateTs

2025-05-08T22:13:03.489Z

stateUserIdentity

7680-5063-1

date

2025-04-01T00:00:00.000Z

testType

id	63ef3b1919aead0036ceca12
code	LAYER_THICKNESS
name	Layer thickness measurement
state	active

institution

id	59d60ee4ed67730005160cd9
code	GL
name	Glasgow University

user

id	61ba17b23be1da000a981c71
userIdentity	7680-5063-1
firstName	Sneha
middleName
lastName	Amogh Naik

runNumber

1.0

passed

True

problems

False

properties

code	name	dataType	valueType	required	value
OPERATOR	Operator	string	single	False	C. Lickley
INSTRUMENT	Instrument	string	single	False	Mitutoyo Linear Gauge LG-130E
ANALYSIS_VERSION	Analysis Version	string	single	False	1.0

results

code TOP_LAYER_THICKNESS
name Top layer thickness (including ENIG) [µm]
dataType float
valueType single
arrayDimensions None
additional False
value 32
associateChild None
code INNER_LAYER_THICKNESS
name Inner layer thickness [µm]
dataType float
valueType single
arrayDimensions None
additional False
value 13
associateChild None
code BOTTOM_LAYER_THICKNESS
name Bottom layer thickness (including ENIG) [µm]
dataType float
valueType single
arrayDimensions None
additional False
value 30
associateChild None
code DIELECTRIC_THICKNESS
name Dielectric thickness [µm]
dataType float
valueType single
arrayDimensions None
additional False
value 120
associateChild None
code COVERLAY_WITH_ADHESIVE_THICKNESS
name Coverlay with Adhesive thickness [µm]
dataType float
valueType single
arrayDimensions None
additional False
value 53
associateChild None
code THICKNESS
name Total PCB thickness [µm]
dataType float
valueType single
arrayDimensions None
additional False
value 257
associateChild None
code CU_THICKNESS
name Effective Cu thickness [µm]
order 1
dataType float
valueType single
arrayDimensions None
additional False
rangeMin None
rangeMax None
value 29.66
associateChild None

cts

2025-05-08T22:13:03.489Z

sys

cts	2025-05-08T22:13:03.489Z
mts	2025-05-08T22:13:03.489Z
rev	0

defects

comments

None

attachments

components

code

state

stateTs

stateUserIdentity

dummy

completed

completedTs

completedUserIdentity

trashed

trashedTs

trashedUserIdentity

serialNumber

alternativeIdentifier

project

subproject

componentType

type

properties

testedAtStage

institution

67f4ba2d69bd7fedf7802096

ca5788617b123b66830f215c1fcebeb4

ready

2025-04-08T05:54:53.417Z

7680-5063-1

False

None

False

None

20UPGPQ4220565

None

code	P
name	Pixels

code	PG
name	Pixel general

code	PCB
name	Module PCB

code	QUAD_PCB
name	Quad PCB

code PCB_MANUFACTURER
name PCB Manufacturer
dataType string
required True
default False
value NCAB

code

PCB_DESIGN_VERSION

name

PCB design version

dataType

codeTable

required

True

default

False

value

Production OS

codeTable

code	value
0	RD53A
1	Prototype
2	Preproduction OS
3	Preproduction IS
4	Production OS
5	Production IS
9	No chip

code

PCB_VENDOR_TECHNOLOGY

name

PCB vendor technology

dataType

codeTable

required

True

default

False

value

NCAB (100 mum trace)

codeTable

code	value
1	EPEC (100 mum trace)
2	NCAB (100 mum trace)
3	ALTAFLEX (75 mum trace)
4	SFCircuits (100 mum trace)
5	PHOENIX (100 mum trae)
6	Yamashita Material (75 mum trace)
7	NCAB (75 mum trace)
8	Tecnomec (100 mum trace)

code SMD_POPULATION_VENDOR
name SMD population vendor
dataType string
required False
default False
value Garner Osborne Circuits
code PCB_BOM_VERSION
name PCB BOM version
dataType codeTable
required False
default False
value V2 L2
codeTable
code value
10 V1.1 L0
11 V1.1 L1
12 V1.1 L2
20 V2 L0
21 V2 L1
22 V2 L2

code	PCB_RECEPTION
name	Reception
order	1
initial	False
final	False

code	GL
name	Glasgow University

Current Stage: Modules failed test, needs investigation

No tests are allocated for this stage.

Past QC Stages and Results

Ranking of the module (MODULE/QC_STATUS)

Final flatness measurement (MODULE/FINAL_METROLOGY)

Final Cold (MODULE/FINAL_COLD)

Final Warm (MODULE/FINAL_WARM)

Long Term Stability Test (MODULE/LONG_TERM_STABILITY_TEST)

Thermal Cycles (MODULE/THERMAL_CYCLES)

Post-Parylene Cold (MODULE/POST_PARYLENE_COLD)

Post-Parylene Warm (MODULE/POST_PARYLENE_WARM)

Wirebond Protection (alt) (MODULE/WIREBOND_PROTECTION)

Parylene Unmasking (MODULE/PARYLENE_UNMASKING)

Parylene Coating (MODULE/PARYLENE_COATING)

Parylene Masking (MODULE/PARYLENE_MASKING)

Initial Cold (MODULE/INITIAL_COLD)

QC cross-check (module swapping) (MODULE/QC_CROSSCHECK)

Initial Warm (MODULE/INITIAL_WARM)

Wire Bonding (MODULE/WIREBONDING)

Bare module to module PCB assembly (MODULE/ASSEMBLY)

Initial state to associate flex to bare module (MODULE/INIT)

Complete (COMPLETE)

PCB Reception at module site (PCB_RECEPTION_MODULE_SITE)

Test	Local Result	ProdDB Record
Mass (MASS)	No result	N/A
Metrology (METROLOGY)	No result	N/A
Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY)	No result	N/A
Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)	No result	N/A
Visual Inspection (VISUAL_INSPECTION)	No result	N/A

PCB ready for module (PCB_READY_FOR_MODULE)

GRAVEYARD - PCB impossible to recover (PCB/GRAVEYARD)

UNHAPPY - Test failed, needs investigation (UNHAPPY)

QC (PCB_QC)

Test	Local Result	ProdDB Record
Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK)	No result	N/A
LV and HV Test (HV_LV_TEST)	Registered	Registered
Tab cutting and gross defect inspection (QUICK_TAB_CUTTING_INSPECTION)	No result	N/A

QA post radiation cycle (QA_POST_RADIATION_CYCLE)

Test	Local Result	ProdDB Record
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A

QA post radiation post thermal cycle QC (QA_POST_RADIATION_POST_THERMAL_CYCLE)

Test	Local Result	ProdDB Record
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A

QA pre-radiation cycle (QA_PRE_RADIATION_CYCLE)

Test	Local Result	ProdDB Record
LV and HV Test (HV_LV_TEST)	No result	N/A
Metrology (METROLOGY)	No result	N/A
NTC Verification (NTC_VERIFICATION)	No result	N/A
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
SLDO and precision resistors (SLDO_RESISTORS)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Wirebond pull test (WIREBOND_PULL_TEST)	No result	N/A

QA post-thermal cycle / thermal shock (QA_POST_THERMAL_CYCLE)

Test	Local Result	ProdDB Record
LV and HV Test (HV_LV_TEST)	No result	N/A
NTC Verification (NTC_VERIFICATION)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Wirebond pull test (WIREBOND_PULL_TEST)	No result	N/A

QA pre-thermal cycle / thermal shock (QA_PRE_THERMAL_CYCLE)

Test	Local Result	ProdDB Record
LV and HV Test (HV_LV_TEST)	No result	N/A
Metrology (METROLOGY)	No result	N/A
NTC Verification (NTC_VERIFICATION)	No result	N/A
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
SLDO and precision resistors (SLDO_RESISTORS)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Wirebond pull test (WIREBOND_PULL_TEST)	No result	N/A

Population (PCB_POPULATION)

Test	Local Result	ProdDB Record
Component Position Check (COMPONENT_POSITION_CHECK)	No result	N/A
Visual Inspection (VISUAL_INSPECTION)	No result	N/A

PCB being populated (PCB_BEING_POPULATED)

Reception (PCB_RECEPTION)

Test	Local Result	ProdDB Record
Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK)	Registered	Registered
Image capture test (IMAGE_CAPTURE_TEST)	No result	N/A
Layer thickness measurement (LAYER_THICKNESS)	Registered	Registered
Metrology (METROLOGY)	No result	N/A
Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY)	No result	N/A
Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Visual Inspection (VISUAL_INSPECTION)	No result	N/A

Bare PCB Initial (PCB_INIT)

LocalDB Test ID	Stage	Test Name	Inspector	Measurement Date	Analysis Date	Tags	QC Registration
691791…9fa1fb	PCB_QC	HV_LV_TEST	KetankumarJadav	N/A	7 months ago	No tags	Selected
681d2c…8d7e48	PCB_RECEPTION	LAYER_THICKNESS	SnehaAmogh Naik	N/A	a year ago	No tags	Selected
68010a…97c07e	PCB_RECEPTION	DOWEL_TOLERANCE_CHECK	SnehaAmogh Naik	N/A	a year ago	No tags	Selected

Stage	Tests
PCB_INIT
PCB_RECEPTION	Visual Inspection (VISUAL_INSPECTION) Metrology (METROLOGY) Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK) Layer thickness measurement (LAYER_THICKNESS) Image capture test (IMAGE_CAPTURE_TEST) Via resistance (VIA_RESISTANCE) Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY) Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)
PCB_BEING_POPULATED
PCB_POPULATION	Visual Inspection (VISUAL_INSPECTION) Component Position Check (COMPONENT_POSITION_CHECK)
QA_PRE_THERMAL_CYCLE	SLDO and precision resistors (SLDO_RESISTORS) NTC Verification (NTC_VERIFICATION) Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE) Metrology (METROLOGY) LV and HV Test (HV_LV_TEST) Wirebond pull test (WIREBOND_PULL_TEST)
QA_POST_THERMAL_CYCLE	NTC Verification (NTC_VERIFICATION) Via resistance (VIA_RESISTANCE) LV and HV Test (HV_LV_TEST) Wirebond pull test (WIREBOND_PULL_TEST)
QA_PRE_RADIATION_CYCLE	Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE) Metrology (METROLOGY) SLDO and precision resistors (SLDO_RESISTORS) NTC Verification (NTC_VERIFICATION) Wirebond pull test (WIREBOND_PULL_TEST) LV and HV Test (HV_LV_TEST)
QA_POST_RADIATION_POST_THERMAL_CYCLE	Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE)
QA_POST_RADIATION_CYCLE	Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE)
PCB_QC	LV and HV Test (HV_LV_TEST) Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK) Tab cutting and gross defect inspection (QUICK_TAB_CUTTING_INSPECTION)
UNHAPPY
PCB/GRAVEYARD
PCB_READY_FOR_MODULE
PCB_RECEPTION_MODULE_SITE	Visual Inspection (VISUAL_INSPECTION) Mass (MASS) Metrology (METROLOGY) Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY) Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)
COMPLETE
MODULE/INIT
MODULE/ASSEMBLY
MODULE/WIREBONDING
MODULE/INITIAL_WARM
MODULE/QC_CROSSCHECK
MODULE/INITIAL_COLD
MODULE/PARYLENE_MASKING
MODULE/PARYLENE_COATING
MODULE/PARYLENE_UNMASKING
MODULE/WIREBOND_PROTECTION
MODULE/POST_PARYLENE_WARM
MODULE/POST_PARYLENE_COLD
MODULE/THERMAL_CYCLES
MODULE/LONG_TERM_STABILITY_TEST
MODULE/FINAL_WARM
MODULE/FINAL_COLD
MODULE/FINAL_METROLOGY
MODULE/QC_STATUS
MODULE/UNHAPPY
MODULE/NOTCONSIDEREDINYIELDS
MODULE/GRAVEYARD
MODULE/COMPLETE
MODULE/RECEPTION
MODULE/TAB_CUTTING
LLS/PRE_TC_WARM
LLS/PRE_TC_COLD
LLS/POST_TC_WARM
LLS/POST_TC_COLD
LLS/RECEPTION
OB_LOADED_MODULE_CELL/INIT
OB_LOADED_MODULE_CELL/ASSEMBLY
OB_LOADED_MODULE_CELL/WIREBOND_PROTECTION
OB_LOADED_MODULE_CELL/THERMAL_CYCLES
OB_LOADED_MODULE_CELL/FINAL_WARM
OB_LOADED_MODULE_CELL/FINAL_COLD
OB_LOADED_MODULE_CELL/THERMAL_COLD
OB_LOADED_MODULE_CELL/THERMAL_WARM
OB_LOADED_MODULE_CELL/ENVELOPE_CHECK
OB_LOADED_MODULE_CELL/QC_STATUS
OB_LOADED_MODULE_CELL/UNHAPPY
OB_LOADED_MODULE_CELL/GRAVEYARD
OB_LOADED_MODULE_CELL/COMPLETE
OB_LOADED_MODULE_CELL/RECEPTION
OB_LOADED_MODULE_CELL/TAB_CUTTING
OB_LOADED_MODULE_CELL/PIGTAIL_INSERTION

20UPGPQ4220565

MODULE/UNHAPPY

Component Information

Properties

Comments

Test: LAYER_THICKNESS QC Passed

(Stage: PCB_RECEPTION)

Basic View Only: custom view for this TestRun is not prepared.

Metadata

Results

ProductionDB Record

Current Stage: Modules failed test, needs investigation

Past QC Stages and Results

Ranking of the module (MODULE/QC_STATUS)

Final flatness measurement (MODULE/FINAL_METROLOGY)

Final Cold (MODULE/FINAL_COLD)

Final Warm (MODULE/FINAL_WARM)

Long Term Stability Test (MODULE/LONG_TERM_STABILITY_TEST)

Thermal Cycles (MODULE/THERMAL_CYCLES)

Post-Parylene Cold (MODULE/POST_PARYLENE_COLD)

Post-Parylene Warm (MODULE/POST_PARYLENE_WARM)

Wirebond Protection (alt) (MODULE/WIREBOND_PROTECTION)

Parylene Unmasking (MODULE/PARYLENE_UNMASKING)

Parylene Coating (MODULE/PARYLENE_COATING)

Parylene Masking (MODULE/PARYLENE_MASKING)

Initial Cold (MODULE/INITIAL_COLD)

QC cross-check (module swapping) (MODULE/QC_CROSSCHECK)

Initial Warm (MODULE/INITIAL_WARM)

Wire Bonding (MODULE/WIREBONDING)

Bare module to module PCB assembly (MODULE/ASSEMBLY)

Initial state to associate flex to bare module (MODULE/INIT)

Complete (COMPLETE)

PCB Reception at module site (PCB_RECEPTION_MODULE_SITE)

PCB ready for module (PCB_READY_FOR_MODULE)

GRAVEYARD - PCB impossible to recover (PCB/GRAVEYARD)

UNHAPPY - Test failed, needs investigation (UNHAPPY)

QC (PCB_QC)

QA post radiation cycle (QA_POST_RADIATION_CYCLE)

QA post radiation post thermal cycle QC (QA_POST_RADIATION_POST_THERMAL_CYCLE)

QA pre-radiation cycle (QA_PRE_RADIATION_CYCLE)

QA post-thermal cycle / thermal shock (QA_POST_THERMAL_CYCLE)

QA pre-thermal cycle / thermal shock (QA_PRE_THERMAL_CYCLE)

Population (PCB_POPULATION)

PCB being populated (PCB_BEING_POPULATED)

Reception (PCB_RECEPTION)

Bare PCB Initial (PCB_INIT)

All Registered QC Tests

Check QC Flow

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