20UPGPQ3602014

MODULE/INITIAL_WARM

Component Information

Serial Number	20UPGPQ3602014
ProdDB ID	0f58f0…f5e9ec
LocalDB ID	65566629b31134004293f22b
Component Type	MODULE_PCB
Parents	20UPIM13602014
Children	No match.
Flags

Damaged during handling

Other issues

Too dirty to be used

Brown marks on traces

Additional cleaning done

Has misplaced pads due to solder mask issue

Used for dummy modules

Used for PCB QA

Properties

Item	Value
PCB Manufacturer	Yamashita
PCB design version readonly	3
PCB vendor technology readonly	6
SMD population vendor	None

Comments

Test: VISUAL_INSPECTION QC Passed

(Stage: PCB_POPULATION)

Basic View Only: custom view for this TestRun is not prepared.

Metadata

Key	Data
QC Passed	True
Date	a year ago
component ObjectId	65566629b31134004293f22b
Stage	PCB_POPULATION
Test Type	VISUAL_INSPECTION
Institute ObjectId
User Name	Burhani Taher Saifuddin
ObjectId of this record	65ed80d130d4aef6251df854
ObjectId of RAW record	65ed80d030d4aef6251df853
Tags	No tags

Results

Key	Data
ANALYSIS_VERSION	mqat v1.0.11
INSTRUMENT	Keyence
OPERATOR	Burhani Taher Saifuddin
COMPONENT_MISALIGNMENT_GRADE	1
DATA_CONNECTOR_ASSEMBLY_GRADE	1
HV_LV_CONNECTOR_ASSEMBLY_GRADE	1
OBSERVATION	-
OVERALL_GRADE	2
PARTICULATE_CONTAMINATION_GRADE	1
SCRATCHES_GRADE	2
SHORTS_OR_CLOSE_PROXIMITY_GRADE	1
SOLDERMASK_IRREGULARITIES_GRADE	1
SOLDER_SPILLS_GRADE	1
WATERMARKS_GRADE	1
WIREBOND_PADS_CONTAMINATION_GRADE	1

Visual Inspection Defects

Download front_image

Filename	Defects	Comment
front_tile6 Download front_tile6		ink overflow onto wire bond pads
front_tile11 Download front_tile11		ink overflow onto wire bond pads
front_tile18 Download front_tile18		ink overflow onto wire bond pads
front_tile24 Download front_tile24		ink overflow onto wire bond pads
front_tile25 Download front_tile25		ink overflow onto probe pads
front_tile28 Download front_tile28	Scratches_PCB	minor scratches

RAW Results Record

Download RAW

serialNumber

20UPGPQ3602014

testType

VISUAL_INSPECTION

results

property

OPERATOR	Burhani Taher Saifuddin
INSTRUMENT	Keyence
ANALYSIS_VERSION	None

comment

metadata

QCHELPER_VERSION

4.0.dev1

MODULE_SN

20UPGPQ3602014

front_defects

28	Yellow.Scratches_PCB

front_comments

0
1
2
3
4
5
6	ink overflow onto wire bond pads
7
8
9
10
11	ink overflow onto wire bond pads
12
13
14
15
16
17
18	ink overflow onto wire bond pads
19
20
21
22
23
24	ink overflow onto wire bond pads
25	ink overflow onto probe pads
26
27
28	minor scratches
29
30
31
32
33
34
35

front_image

673bce538bd2691624145f59

front_defect_images

6	673bce528bd2691624145d93
11	673bce528bd2691624145dbc
18	673bce528bd2691624145db0
24	673bce528bd2691624145dd7
25	673bce528bd2691624145d98
28	673bce528bd2691624145da8

Metadata

Measurements

WIREBOND_PADS_CONTAMINATION_GRADE

None

PARTICULATE_CONTAMINATION_GRADE

None

WATERMARKS_GRADE

None

SCRATCHES_GRADE

None

TRACES_GRADE

None

SOLDERMASK_IRREGULARITIES_GRADE

None

HV_LV_CONNECTOR_ASSEMBLY_GRADE

None

DATA_CONNECTOR_ASSEMBLY_GRADE

None

SOLDER_SPILLS_GRADE

None

COMPONENT_MISALIGNMENT_GRADE

None

SHORTS_OR_CLOSE_PROXIMITY_GRADE

None

OPENS_TOMBSTONING_GRADE

None

OVERALL_GRADE

None

OBSERVATION

None

stage

PCB_POPULATION

component

65566629b31134004293f22b

dbVersion

1.01

address

64657cef8d79bac1f3f00582

sys

mts	2024-03-10 09:43:44.525000
cts	2024-03-10 09:43:44.525000
rev	0

ProductionDB Record

Expand ProductionDB Record

65ed88cdbb920b0035f030e8

state

ready

stateTs

2024-03-10T10:17:49.126Z

stateUserIdentity

277-6873-1

date

2024-03-10T09:43:00.000Z

testType

id	5f644fba928ccc000ad1215f
code	VISUAL_INSPECTION
name	Visual Inspection
state	active

institution

id	5d428100f6e07b000a559e87
code	OKLAHOMA
name	University of Oklahoma

user

id	626da70bba163f000aa52801
userIdentity	277-6873-1
firstName	Burhani Taher
middleName
lastName	Saifuddin

runNumber

65ed80d130d4aef6251df854

passed

True

problems

False

properties

code	name	dataType	valueType	required	value	rangeMin	rangeMax
ANALYSIS_VERSION	Analysis version	string	single	False	1.0.11	None	None
INSTRUMENT	Instrument	string	single	False	Keyence	None	None
OPERATOR	Operator	string	single	False	Burhani Taher Saifuddin	None	None

results

code	name	dataType	valueType	arrayDimensions	additional	value	associateChild
COMPONENT_MISALIGNMENT_GRADE	Component misalignment (scale 1-3)	integer	single	None	False	1	None
DATA_CONNECTOR_ASSEMBLY_GRADE	Data connector assembly issue (scale 1-3)	integer	single	None	False	1	None
HV_LV_CONNECTOR_ASSEMBLY_GRADE	HV LV connector assembly issue (scale 1-3)	integer	single	None	False	1	None
OBSERVATION	Observation	string	single	None	False	-	None
OVERALL_GRADE	Overall grade (scale 1-3)	integer	single	None	False	2	None
PARTICULATE_CONTAMINATION_GRADE	Particulate contamination on the PCB including pick-up points (scale 1-3)	integer	single	None	False	1	None
SCRATCHES_GRADE	Scratches on the wirebonding pads and the PCD that can cause issues with wirebonding and/or electrical functionality of the PCB (scale 1-3)	integer	single	None	False	2	None
SHORTS_OR_CLOSE_PROXIMITY_GRADE	Shorts/close proximity of components due to misalignment (scale 1-3)	integer	single	None	False	1	None
SOLDERMASK_IRREGULARITIES_GRADE	Soldermask irregularity/cracks grade (scale 1-3)	integer	single	None	False	1	None
SOLDER_SPILLS_GRADE	Solder spills as part of assembly process on wirebonding pads (scale 1-3)	integer	single	None	False	1	None
WATERMARKS_GRADE	Watermarks on the PCB (scale 1-3)	integer	single	None	False	1	None
WIREBOND_PADS_CONTAMINATION_GRADE	Wirebond pads clear of contamination, discolouring, spills, deposits, particles, etc that can cause issues with wirebonding(scale 1-3)	integer	single	None	False	1	None

cts

2024-03-10T10:17:49.126Z

sys

cts	2024-03-10T10:17:49.126Z
mts	2024-10-06T19:00:41.021Z
rev	11

defects

code	name	description	properties
8b3578fd4e3c8a0d54c8f88e	front_tile28	Yellow.Scratches_PCB

comments

code

dateTime

comment

user

7711e82314c7623fdcd594c8

2024-03-10T10:18:54.396Z

tile_comment::front_tile6 : ink overflow onto wire bond pads

id	626da70bba163f000aa52801
userIdentity	277-6873-1
firstName	Burhani Taher
middleName
lastName	Saifuddin

f91f12abb2d2c0bc4cbaa6d1

2024-03-10T10:18:54.396Z

tile_comment::front_tile11 : ink overflow onto wire bond pads

id	626da70bba163f000aa52801
userIdentity	277-6873-1
firstName	Burhani Taher
middleName
lastName	Saifuddin

f53de14f4a795310ca347b31

2024-03-10T10:18:54.396Z

tile_comment::front_tile18 : ink overflow onto wire bond pads

id	626da70bba163f000aa52801
userIdentity	277-6873-1
firstName	Burhani Taher
middleName
lastName	Saifuddin

c11d7aec59db83b43bafa225

2024-03-10T10:18:54.396Z

tile_comment::front_tile24 : ink overflow onto wire bond pads

id	626da70bba163f000aa52801
userIdentity	277-6873-1
firstName	Burhani Taher
middleName
lastName	Saifuddin

bc35165bd31bf580527d3ad6

2024-03-10T10:18:54.396Z

tile_comment::front_tile25 : ink overflow onto probe pads

id	626da70bba163f000aa52801
userIdentity	277-6873-1
firstName	Burhani Taher
middleName
lastName	Saifuddin

eb9dc4ea4cdd07fb9ca3f7c6

2024-03-10T10:18:54.396Z

tile_comment::front_tile28 : minor scratches

id	626da70bba163f000aa52801
userIdentity	277-6873-1
firstName	Burhani Taher
middleName
lastName	Saifuddin

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Visual Inspection Image

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middleName
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components

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dummy

completed

completedTs

completedUserIdentity

trashed

trashedTs

trashedUserIdentity

serialNumber

alternativeIdentifier

project

subproject

componentType

type

properties

testedAtStage

institution

65566629b31134004293f22b

0f58f0f4897692274a4f019605f5e9ec

ready

2023-11-16T18:57:45.798Z

6795-7859-1

False

None

False

None

20UPGPQ3602014

None

code	P
name	Pixels

code	PG
name	Pixel general

code	PCB
name	Module PCB

code	QUAD_PCB
name	Quad PCB

code PCB_MANUFACTURER
name PCB Manufacturer
dataType string
required True
default False
value Yamashita

code

PCB_DESIGN_VERSION

name

PCB design version

dataType

codeTable

required

True

default

False

value

Preproduction IS

codeTable

code	value
0	RD53A
1	Prototype
2	Preproduction OS
3	Preproduction IS
4	Production OS
5	Production IS
9	No chip

code

PCB_VENDOR_TECHNOLOGY

name

PCB vendor technology

dataType

codeTable

required

True

default

False

value

Yamashita Material (75 mum trace)

codeTable

code	value
1	EPEC (100 mum trace)
2	NCAB (100 mum trace)
3	ALTAFLEX (75 mum trace)
4	SFCircuits (100 mum trace)
5	PHOENIX (100 mum trae)
6	Yamashita Material (75 mum trace)
7	NCAB (75 mum trace)
8	Tecnomec (100 mum trace)

code	PCB_POPULATION
name	Population
order	1
initial	False
final	False

code	OKLAHOMA
name	University of Oklahoma

Current Stage: Initial Warm

No tests are allocated for this stage.

Past QC Stages and Results

Wire Bonding (MODULE/WIREBONDING)

Bare module to module PCB assembly (MODULE/ASSEMBLY)

Initial state to associate flex to bare module (MODULE/INIT)

Complete (COMPLETE)

PCB Reception at module site (PCB_RECEPTION_MODULE_SITE)

Test	Local Result	ProdDB Record
Mass (MASS)	No result	N/A
Metrology (METROLOGY)	Registered	Registered
Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY)	No result	N/A
Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)	No result	N/A
Visual Inspection (VISUAL_INSPECTION)	Registered	Registered

PCB ready for module (PCB_READY_FOR_MODULE)

PCB impossible to recover (PCB/GRAVEYARD)

Test failed, needs investigation (UNHAPPY)

QC (PCB_QC)

Test	Local Result	ProdDB Record
Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK)	No result	N/A
LV and HV Test (HV_LV_TEST)	Registered	Registered

QA post radiation cycle (QA_POST_RADIATION_CYCLE)

Test	Local Result	ProdDB Record
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A

QA post radiation post thermal cycle QC (QA_POST_RADIATION_POST_THERMAL_CYCLE)

Test	Local Result	ProdDB Record
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A

QA pre-radiation cycle (QA_PRE_RADIATION_CYCLE)

Test	Local Result	ProdDB Record
LV and HV Test (HV_LV_TEST)	No result	N/A
Metrology (METROLOGY)	No result	N/A
NTC Verification (NTC_VERIFICATION)	No result	N/A
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
SLDO and precision resistors (SLDO_RESISTORS)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Wirebond pull test (WIREBOND_PULL_TEST)	No result	N/A

QA post-thermal cycle / thermal shock (QA_POST_THERMAL_CYCLE)

Test	Local Result	ProdDB Record
LV and HV Test (HV_LV_TEST)	No result	N/A
NTC Verification (NTC_VERIFICATION)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Wirebond pull test (WIREBOND_PULL_TEST)	No result	N/A

QA pre-thermal cycle / thermal shock (QA_PRE_THERMAL_CYCLE)

Test	Local Result	ProdDB Record
LV and HV Test (HV_LV_TEST)	No result	N/A
Metrology (METROLOGY)	No result	N/A
NTC Verification (NTC_VERIFICATION)	No result	N/A
Signal Transmission (SIGNAL_TRANSMISSION)	No result	N/A
SLDO and precision resistors (SLDO_RESISTORS)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Wirebond pull test (WIREBOND_PULL_TEST)	No result	N/A

Population (PCB_POPULATION)

Test	Local Result	ProdDB Record
Component Position Check (COMPONENT_POSITION_CHECK)	No result	N/A
Visual Inspection (VISUAL_INSPECTION)	Registered	Registered

PCB being populated (PCB_BEING_POPULATED)

Reception (PCB_RECEPTION)

Test	Local Result	ProdDB Record
Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK)	No result	N/A
Image capture test (IMAGE_CAPTURE_TEST)	No result	N/A
Layer thickness measurement (LAYER_THICKNESS)	No result	N/A
Metrology (METROLOGY)	No result	N/A
Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY)	No result	N/A
Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)	No result	N/A
Via resistance (VIA_RESISTANCE)	No result	N/A
Visual Inspection (VISUAL_INSPECTION)	No result	N/A

Bare PCB Initial (PCB_INIT)

LocalDB Test ID	Stage	Test Name	Inspector	Measurement Date	Analysis Date	Tags	QC Registration
66a94e…030d55	PCB_RECEPTION_MODULE_SITE	VISUAL_INSPECTION	Daniel	N/A	a year ago	No tags	Selected
65ed80…1df854	PCB_POPULATION	VISUAL_INSPECTION	Burhani Taher Saifuddin	N/A	a year ago	No tags	Selected
66a938…b23a93	PCB_RECEPTION_MODULE_SITE	METROLOGY	Daniel	N/A	a year ago	No tags	Selected
660306…cde92b	PCB_QC	HV_LV_TEST	Daniel	N/A	a year ago	No tags	Selected

Stage	Tests
PCB_INIT
PCB_RECEPTION	Visual Inspection (VISUAL_INSPECTION) Metrology (METROLOGY) Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK) Layer thickness measurement (LAYER_THICKNESS) Image capture test (IMAGE_CAPTURE_TEST) Via resistance (VIA_RESISTANCE) Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY) Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)
PCB_BEING_POPULATED
PCB_POPULATION	Visual Inspection (VISUAL_INSPECTION) Component Position Check (COMPONENT_POSITION_CHECK)
QA_PRE_THERMAL_CYCLE	SLDO and precision resistors (SLDO_RESISTORS) NTC Verification (NTC_VERIFICATION) Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE) Metrology (METROLOGY) LV and HV Test (HV_LV_TEST) Wirebond pull test (WIREBOND_PULL_TEST)
QA_POST_THERMAL_CYCLE	NTC Verification (NTC_VERIFICATION) Via resistance (VIA_RESISTANCE) LV and HV Test (HV_LV_TEST) Wirebond pull test (WIREBOND_PULL_TEST)
QA_PRE_RADIATION_CYCLE	Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE) Metrology (METROLOGY) SLDO and precision resistors (SLDO_RESISTORS) NTC Verification (NTC_VERIFICATION) Wirebond pull test (WIREBOND_PULL_TEST) LV and HV Test (HV_LV_TEST)
QA_POST_RADIATION_POST_THERMAL_CYCLE	Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE)
QA_POST_RADIATION_CYCLE	Signal Transmission (SIGNAL_TRANSMISSION) Via resistance (VIA_RESISTANCE)
PCB_QC	LV and HV Test (HV_LV_TEST) Dowel Tolerance Check (DOWEL_TOLERANCE_CHECK) Tab cutting and gross defect inspection (QUICK_TAB_CUTTING_INSPECTION)
UNHAPPY
PCB/GRAVEYARD
PCB_READY_FOR_MODULE
PCB_RECEPTION_MODULE_SITE	Visual Inspection (VISUAL_INSPECTION) Mass (MASS) Metrology (METROLOGY) Metrology Triplet Linear (TRIPLET_PCB_LINEAR_METROLOGY) Metrology Triplet Ring (TRIPLET_PCB_RING_METROLOGY)
COMPLETE
MODULE/INIT
MODULE/ASSEMBLY
MODULE/WIREBONDING
MODULE/INITIAL_WARM
MODULE/QC_CROSSCHECK
MODULE/INITIAL_COLD
MODULE/PARYLENE_MASKING
MODULE/PARYLENE_COATING
MODULE/PARYLENE_UNMASKING
MODULE/WIREBOND_PROTECTION
MODULE/POST_PARYLENE_WARM
MODULE/POST_PARYLENE_COLD
MODULE/THERMAL_CYCLES
MODULE/LONG_TERM_STABILITY_TEST
MODULE/FINAL_WARM
MODULE/FINAL_COLD
MODULE/FINAL_METROLOGY
MODULE/QC_STATUS
MODULE/UNHAPPY
MODULE/NOTCONSIDEREDINYIELDS
MODULE/GRAVEYARD
MODULE/COMPLETE
MODULE/RECEPTION
MODULE/TAB_CUTTING
LLS/PRE_TC_WARM
LLS/PRE_TC_COLD
LLS/POST_TC_WARM
LLS/POST_TC_COLD
LLS/RECEPTION
OB_LOADED_MODULE_CELL/INIT
OB_LOADED_MODULE_CELL/ASSEMBLY
OB_LOADED_MODULE_CELL/THERMAL_CYCLES
OB_LOADED_MODULE_CELL/FINAL_WARM
OB_LOADED_MODULE_CELL/FINAL_COLD
OB_LOADED_MODULE_CELL/THERMAL_COLD
OB_LOADED_MODULE_CELL/THERMAL_WARM
OB_LOADED_MODULE_CELL/ENVELOPE_CHECK
OB_LOADED_MODULE_CELL/QC_STATUS
OB_LOADED_MODULE_CELL/UNHAPPY
OB_LOADED_MODULE_CELL/COMPLETE
OB_LOADED_MODULE_CELL/RECEPTION
OB_LOADED_MODULE_CELL/TAB_CUTTING
OB_LOADED_MODULE_CELL/PIGTAIL_INSERTION

20UPGPQ3602014

MODULE/INITIAL_WARM

Component Information

Properties

Comments

Test: VISUAL_INSPECTION QC Passed

(Stage: PCB_POPULATION)

Basic View Only: custom view for this TestRun is not prepared.

Metadata

Results

Visual Inspection Defects

RAW Results Record

ProductionDB Record

Current Stage: Initial Warm

Past QC Stages and Results

Wire Bonding (MODULE/WIREBONDING)

Bare module to module PCB assembly (MODULE/ASSEMBLY)

Initial state to associate flex to bare module (MODULE/INIT)

Complete (COMPLETE)

PCB Reception at module site (PCB_RECEPTION_MODULE_SITE)

PCB ready for module (PCB_READY_FOR_MODULE)

PCB impossible to recover (PCB/GRAVEYARD)

Test failed, needs investigation (UNHAPPY)

QC (PCB_QC)

QA post radiation cycle (QA_POST_RADIATION_CYCLE)

QA post radiation post thermal cycle QC (QA_POST_RADIATION_POST_THERMAL_CYCLE)

QA pre-radiation cycle (QA_PRE_RADIATION_CYCLE)

QA post-thermal cycle / thermal shock (QA_POST_THERMAL_CYCLE)

QA pre-thermal cycle / thermal shock (QA_PRE_THERMAL_CYCLE)

Population (PCB_POPULATION)

PCB being populated (PCB_BEING_POPULATED)

Reception (PCB_RECEPTION)

Bare PCB Initial (PCB_INIT)

All Registered QC Tests

Check QC Flow

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